参数资料
型号: LTC3836EUFD#TRPBF
厂商: Linear Technology
文件页数: 15/30页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-QFN
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 825kHz
占空比: 97%
电源电压: 2.75 V ~ 4.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3836
APPLICATIONS INFORMATION
The MOSFET power dissipations at maximum output
current are:
Operating Frequency and Synchronization
The choice of operating frequency, f OSC , is a trade-off
?I OUT(MAX)2 ? T ? R DS(ON) + 2 ? V IN2
P TOP =
V OUT
V IN
? I OUT(MAX) ? C RSS ? f OSC
between ef?ciency and component size. Low frequency
operation improves ef?ciency by reducing MOSFET
switching losses, both gate charge loss and transition
loss. However, lower frequency operation requires more
P BOT =
V IN – V OUT
V IN
?I OUT(MAX)2 ?
T
? R DS(ON)
inductance for a given amount of ripple current.
The internal oscillator for each of the LTC3836’s controllers
Both MOSFETs have I 2 R losses and the P TOP equation
includes an additional term for transition losses, which are
largest at high input voltages. The bottom MOSFET losses
are greatest at high input voltage or during a short-circuit
when the bottom duty cycle is nearly 100%.
2.0
1.5
1.0
runs at a nominal 550kHz frequency when the PLLLPF
pin is left ?oating and the SYNC/FCB pin is a DC low or
high. Pulling the PLLLPF to V IN selects 750kHz operation;
pulling the PLLLPF to GND selects 300kHz operation.
Alternatively, the LTC3836 will phase-lock to a clock signal
applied to the SYNC/FCB pin with a frequency between
250kHz and 850kHz (see Phase-Locked Loop and Fre-
quency Synchronization).
Inductor Value Calculation
Given the desired input and output voltages, the inductor
value and operating frequency f OSC directly determine the
inductor’s peak-to-peak ripple current:
I RIPPLE = OUT
0.5
V
V IN
V IN – V OUT
f OSC ? L
0
–50
0 50 100
JUNCTION TEMPERATURE ( ° C)
150
Lower ripple current reduces core losses in the inductor,
V IN – V OUT
? OUT
3836 F04
Figure 4. R DS(ON) vs Temperature
The LTC3836 utilizes a nonoverlapping, antishoot-through
gate drive control scheme to ensure that the MOSFETs
are not turned on at the same time. To function properly,
the control scheme requires that the MOSFETs used are
intended for DC/DC switching applications. Many power
MOSFETs are intended to be used as static switches and
therefore are slow to turn on or off.
ESR losses in the output capacitors, and output voltage
ripple. Thus, highest ef?ciency operation is obtained at
low frequency with a small ripple current. Achieving this,
however, requires a large inductor.
A reasonable starting point is to choose a ripple current
that is about 40% of I OUT(MAX) . Note that the largest ripple
current occurs at the highest input voltage. To guarantee
that ripple current does not exceed a speci?ed maximum,
the inductor should be chosen according to:
V
L
f OSC ?I RIPPLE V IN
3836fb
15
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