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参数资料
| 型号： | LTC3890EGN-1#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, PDSO28 |
| 封装： | LEAD FREE, PLASTIC, SSOP-28 |
| 文件页数： | 18/36页 |
| 文件大小： | 498K |
| 代理商： | LTC3890EGN-1#PBF |
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LTC3890-1
25
38901f
APPLICATIONS INFORMATION
during the design phase. The internal battery and fuse
resistance losses can be minimized by making sure that
CIN has adequate charge storage and very low ESR at
the switching frequency. A 25W supply will typically
require a minimum of 20μF to 40μF of capacitance
having a maximum of 20mΩ to 50mΩ of ESR. The
LTC3890-1 2-phase architecture typically halves this
input capacitance requirement over competing solu-
tions. Other losses including Schottky conduction losses
during dead-time and inductor core losses generally
account for less than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, VOUT shifts by
an amount equal to ΔILOAD (ESR), where ESR is the ef-
fective series resistance of COUT. ΔILOAD also begins to
charge or discharge COUT generating the feedback error
signal that forces the regulator to adapt to the current
change and return VOUT to its steady-state value. During
this recovery time VOUT can be monitored for excessive
overshoot or ringing, which would indicate a stability
problem. OPTI-LOOP compensation allows the transient
response to be optimized over a wide range of output
capacitance and ESR values. The availability of the ITH pin
not only allows optimization of control loop behavior, but
it also provides a DC coupled and AC ltered closed-loop
response test point. The DC step, rise time and settling
at this test point truly reects the closed-loop response.
Assuming a predominantly second order system, phase
margin and/or damping factor can be estimated using the
percentage of overshoot seen at this pin. The bandwidth
can also be estimated by examining the rise time at the
pin. The ITH external components shown in Figure 13
circuit will provide an adequate starting point for most
applications.
The ITH series RC-CC lter sets the dominant pole-zero
loop compensation. The values can be modied slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the nal PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
gain and phase. An output current pulse of 20% to 80%
of full-load current having a rise time of 1μs to 10μs will
produce output voltage and ITH pin waveforms that will
give a sense of the overall loop stability without breaking
the feedback loop.
Placing a power MOSFET directly across the output
capacitor and driving the gate with an appropriate signal
generator is a practical way to produce a realistic load step
condition. The initial output voltage step resulting from
the step change in output current may not be within the
bandwidth of the feedback loop, so this signal cannot be
used to determine phase margin. This is why it is better to
look at the ITH pin signal which is in the feedback loop and
is the ltered and compensated control loop response.
The gain of the loop will be increased by increasing RC
and the bandwidth of the loop will be increased by de-
creasing CC. If RC is increased by the same factor that CC
is decreased, the zero frequency will be kept the same,
thereby keeping the phase shift the same in the most
critical frequency range of the feedback loop. The output
voltage settling behavior is related to the stability of the
closed-loop system and will demonstrate the actual overall
supply performance.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
CLOAD to COUT is greater than 1:50, the switch rise time
should be controlled so that the load rise time is limited
to approximately 25 CLOAD. Thus a 10μF capacitor would
require a 250μs rise time, limiting the charging current
to about 200mA.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC3890EGN-3#PBF | 制造商:Linear Technology 功能描述:IC REG CTRLR BUCK PWM CM 28SSOP 制造商:Linear Technology 功能描述:DC-DC CONTROLLER BUCK 900KHZ 制造商:Linear Technology 功能描述:DC-DC CONTROLLER, BUCK, 900KHZ, SSOP-28 制造商:Linear Technology 功能描述:DC-DC CONTROLLER, BUCK, 900KHZ, SSOP-28; Primary Input Voltage:60V; No. of Outputs:2; No. of Pins:28; Operating Temperature Min:-40C; Operating Temperature Max:125C; Operating Temperature Range:-40C to +125C ;RoHS Compliant: Yes |
| LTC3890EGN-3#TRPBF | 制造商:Linear Technology 功能描述:IC REG CTRLR BUCK PWM CM 28SSOP |
| LTC3890EUH#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 特色产品:LM3753/54 Scalable 2-Phase Synchronous Buck Controllers 标准包装:1 系列:PowerWise® PWM 型:电压模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.5 V ~ 18 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-5°C ~ 125°C 封装/外壳:32-WFQFN 裸露焊盘 包装:Digi-Reel® 产品目录页面:1303 (CN2011-ZH PDF) 其它名称:LM3754SQDKR |
| LTC3890EUH#TRPBF | 功能描述:IC REG CTRLR BUCK PWM CM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
| LTC3890EUH-2#PBF | 制造商:Linear Technology 功能描述:DC DC Cntrlr Dual-OUT Sync Step Down 4V to 60V Input 32-Pin QFN EP 制造商:Linear Technology 功能描述:DP-SWREG/Controller, 60V, Low IQ, Dual Output Synchronous Step-Down Controller |
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