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参数资料
| 型号： | LTC4259ACGW#TR |
| 厂商： | Linear Technology |
| 文件页数： | 8/32页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR POE QUAD AC DISC 36SSOP |
| 标准包装： | 1,000 |
| 控制器类型： | 以太网供电控制器（POE） |
| 接口： | I²C |
| 电源电压： | 3 V ~ 4 V |
| 电流 - 电源： | 2.5mA |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-BSOP（0.295"，7.50mm 宽） |
| 供应商设备封装： | 36-SSOP |
| 包装： | 带卷 (TR) |
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LTC4259A
16
4259afb
The LTC4259A checks for the signature resistance by
forcing two test currents on the port (via the DETECT
n
pins) in sequence and measuring the resulting voltages. It
then subtracts the two V-I points to determine the resistive
slope while removing voltage offset caused by any series
diodes or current offset caused by leakage at the port (see
Figure 13). The LTC4259A will typically accept any PD
resistance between 17k and 29k as a valid PD and report
Detect Good (100 binary) in the Detect Status bits (bits 2
through 0) of the corresponding Port Status register.
Values outside this range, including open and short cir-
cuits, are also reported in the Detect Status bits. Refer to
Table 1 for a complete decoding of the Detect Status bits.
The first test point is taken by forcing a test current into
the port, waiting a short time to allow the line to settle and
measuring the resulting voltage. This result is stored and
the second current is applied to the port, allowed to settle
and the voltage measured. Each point takes 100ms to
measure, and an entire detection cycle takes 200ms.
The LTC4259A will not report Detect Good if the PD has
more than 5
F in parallel with its signature resistor.
The port’s operating mode controls if and when the
LTC4259A runs a detection cycle. In manual mode, the
port will sit idle until a Restart Detection (register 18h)
command is received. It will then run a complete 200ms
detection cycle on the selected port, report the results in
the Detect Status bits in the corresponding Port Status
register and return to idle until another command is
received. In Semiauto mode, the LTC4259A autonomously
tests valid PDs connected to the ports but it will not apply
power until instructed to do so by the host controller. It
repeatedly queries the port every 320ms and updates the
Detect Status bits at the end of each cycle. If a Detect Good
is reported, it will advance to the classification phase and
report that result in the Port Status register. Until in-
structed to do otherwise, the LTC4259A will continue to
repeat detection on the port. Behavior in Auto mode is
similar to Semiauto; however, after a Detect Good is
reported, the LTC4259A performs the classification phase
and then powers up the port without further intervention.
The signature detection circuitry is disabled when the port
is in Shutdown mode, powered up or the corresponding
Detect Enable bit is cleared.
CLASSIFICATION
A PD has the option of presenting a “classification signa-
ture” to the PSE to indicate how much power it will draw
when powered up. This signature consists of a specific
constant current draw when the PSE port voltage is between
15.5V and 20.5V, with the current level indicating the power
class to which the PD belongs. Per the IEEE 802.3af speci-
fication, the LTC4259A identifies the five classes of PD listed
in Table 2. During classification, the LTC4259A controls and
APPLICATIO S I FOR ATIO
WU
UU
Figure 13. PD Detection
Table 2. IEEE 802.3af Powered Device Classes
IEEE 802.3af
CLASSIFICATION
MAXIMUM
MINIMUM PSE
CLASS
CURRENT AT PSE
PD POWER
OUTPUT POWER
CLASS DESCRIPTION
0
0mA to 5mA
12.95W
15.4W
PD Does Not Implement Classification, Unknown Power
1
8mA to 13mA
3.84W
4W
Low Power PD
2
16mA to 21mA
6.49W
7W
Medium Power PD
3
25mA to 31mA
12.95W
15.4W
High or Full Power PD
4
35mA to 45mA
12.95W
15.4W
Reserved, Power as Class O
FIRST
DETECTION
POINT
SECOND
DETECTION
POINT
VALID PD
25k
SLOPE
275
165
CURRENT
(
A)
0V-2V
OFFSET
VOLTAGE
4259A F13
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相关代理商/技术参数 |
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