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| 型号： | LTC4414IMS8#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/12页 |
| 文件大小： | 0K |
| 描述： | IC CNTRLR POWERPATH 8-MSOP |
| 标准包装： | 50 |
| 系列： | PowerPath™ |
| 应用： | 电池备份，工业/汽车，大电流开关 |
| FET 型： | P 沟道 |
| 输出数： | 1 |
| 内部开关： | 无 |
| 延迟时间 - 开启： | 600µs |
| 延迟时间 - 关闭： | 20µs |
| 电源电压： | 3 V ~ 36 V |
| 电流 - 电源： | 33µA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 管件 |
LTC4414
APPLICATIO S I FOR ATIO
Introduction
The system designer will find the LTC4414 useful in a
variety of cost and space sensitive power control applica-
tions that include low loss diode OR’ing, fully automatic
switchover from a primary to an auxiliary source of power,
microcontroller controlled switchover from a primary to
an auxiliary source of power, charging of multiple batter-
ies from a single charger and high side power switching.
External P-Channel MOSFET Transistor Selection
Important parameters for the selection of MOSFETs are
the maximum drain-source voltage V DS(MAX), threshold
voltage V GS(VT) and on-resistance R DS(ON) .
The maximum allowable drain-source voltage, V DS(MAX),
must be high enough to withstand the maximum drain-
source voltage seen in the application.
The maximum gate drive voltage for the primary MOSFET
is set by the smaller of the V IN supply voltage or the internal
clamping voltage V G(ON). A logic level MOSFET is com-
monly used, but if a low supply voltage limits the gate
voltage, a sub-logic level threshold MOSFET should be
considered. The maximum gate drive voltage for the
auxiliary MOSFET, if used, is determined by the external
resistor connected to the STAT pin.
As a general rule, select a MOSFET with a low enough
R DS(ON) to obtain the desired V DS while operating at full
load current and an achievable V GS . The MOSFET normally
operates in the linear region and acts like a voltage
controlled resistor. If the MOSFET is grossly undersized,
it can enter the saturation region and a large V DS may
result. However, the drain-source diode of the MOSFET, if
forward biased, will limit V DS . A large V DS , combined with
the load current, will likely result in excessively high
MOSFET power dissipation. Keep in mind that the LTC4414
will regulate the forward voltage drop across the primary
MOSFET at 20mV if R DS(ON) is low enough. The required
R DS(ON) can be calculated by dividing 0.02V by the load
current in amps. Achieving forward regulation will mini-
mize power loss and heat dissipation, but it is not a
necessity. If a forward voltage drop of more than 20mV is
acceptable then a smaller MOSFET can be used, but must
be sized compatible with the higher power dissipation.
Care should be taken to ensure that the power dissipated
is never allowed to rise above the manufacturer’s recom-
mended maximum level. The auxiliary MOSFET power
switch, if used, has similar considerations, but its V GS can
be tailored by resistor selection. When choosing the
resistor value consider the full range of STAT pin current
(I S(SNK) ) that may flow through it.
V IN and SENSE Pin Bypass Capacitors
Many types of capacitors, ranging from 0.1 μ F to 10 μ F and
located close to the LTC4414, will provide adequate V IN
bypassing if needed. Voltage droop can occur at the load
during a supply switchover because some time is required
to turn on the MOSFET power switch. Factors that deter-
mine the magnitude of the voltage droop include the
supply rise and fall times, the MOSFET’s characteristics,
the value of C OUT and the load current. Droop can be made
insignificant by the proper choice of C OUT , since the droop
is inversely proportional to the capacitance. Bypass ca-
pacitance for the load also depends on the application’s
dynamic load requirements and typically ranges from 1 μ F
to 47 μ F. In all cases, the maximum droop is limited to the
drain source diode forward drop inside the MOSFET.
Caution must be exercised when using multilayer ceramic
capacitors. Because of the self resonance and high Q
characteristics of some types of ceramic capacitors, high
voltage transients can be generated under some start-up
conditions such as connecting a supply input to a hot
power source. To reduce the Q and prevent these tran-
sients from exceeding the LTC4414’s absolute maximum
voltage rating, the capacitor’s ESR can be increased by
adding up to several ohms of resistance in series with the
ceramic capacitor. Refer to Application Note 88.
The selected capacitance value and capacitor’s ESR can be
verified by observing V IN and SENSE for acceptable volt-
age transitions during dynamic conditions over the full
load current range. This should be checked with each
power source as well. Ringing may indicate an incorrect
bypass capacitor value and/or too low an ESR.
V IN and SENSE Pin Usage
Since the analog controller’s thresholds are small ( ± 20mV),
the V IN and SENSE pin connections should be made in a
4414fc
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