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参数资料
| 型号： | LTC6946IUFD-2#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/30页 |
| 文件大小： | 0K |
| 描述： | IC INTEGER-N PLL W/VCO 28-QFN |
| 软件下载： | PLLWizard™ PLLWizard™, with .NET 2.0 installer |
| 标准包装： | 73 |
| 类型： | 时钟/频率合成器（RF/IF），分数-N，整数-N， |
| PLL： | 是 |
| 输入： | 时钟 |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 4.91GHz |
| 除法器/乘法器： | 是/是 |
| 电源电压： | 3.15 V ~ 5.25 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-QFN（4x5） |
| 包装： | 管件 |
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LTC6946
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PIN FUNCTIONS
VRF+ (Pin 13): 3.15V to 3.45V Positive Supply Pin for
RF Circuitry. This pin should be bypassed directly to the
ground plane using a 0.01μF ceramic capacitor as close
to the pin as possible.
BB (Pin 14): RF Reference Bypass. This output must be
bypassed with a 1.0μF ceramic capacitor to GND. Do not
couple this pin to any other signal.
TUNE (Pin 15): VCO Tuning Input. This frequency control
pin is normally connected to the external loop filter. See
the Applications Information section for more details.
TB (Pin 16): VCO Bypass. This output must be bypassed
with a 2.2μF ceramic capacitor to GND, and is normally
connected to CMA, CMB and CMC with a short trace. Do
not couple this pin to any other signal.
CMC, CMB, CMA (Pins 18, 19, 20): VCO Bias Inputs. These
inputs are normally connected to TB with a short trace
and bypassed with a 2.2μF ceramic capacitor to GND. Do
not couple these pins to any other signal. For best phase
noise performance, do not place a trace between these
pads underneath the package.
VVCO+ (Pin 22): 4.75V to 5.25V Positive Supply Pin for
VCO Circuitry. This pin should be bypassed directly to the
ground plane using both 0.01μF and 1μF ceramic capaci-
tors as close to the pin as possible.
GND (23): Negative Power Supply (Ground). This pin is
attached directly to the die attach paddle (DAP) and should
be tied directly to the ground plane.
VCP+ (Pin 24): 4.0V to 5.25V Positive Supply Pin for Charge
Pump Circuitry. This pin should be bypassed directly to
the ground plane using a 0.1μF ceramic capacitor as close
to the pin as possible.
CP (Pin 25): Charge Pump Output. This bi-directional
current output is normally connected to the external loop
filter. See the Applications Information section for more
details.
VREF+ (Pin 26): 3.15V to 3.45V Positive Supply Pin for
Reference Input Circuitry. This pin should be bypassed
directly to the ground plane using a 0.1μF ceramic capaci-
tor as close to the pin as possible.
REF+, REF– (Pins 27, 28):
Reference Input Signals. This
differential input is buffered with a low noise amplifier,
which feeds the reference divider and reference buffer.
They are self-biased and must be AC-coupled with 470pF
capacitors. If used single ended, bypass REF– to GND with
a 470pF capacitor.
GND (Exposed Pad Pin 29): Negative Power Supply
(Ground). The package exposed pad must be soldered
directly to the PCB land. The PCB land pattern should have
multiple thermal vias to the ground plane for both low
ground inductance and also low thermal resistance.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC6946IUFD-3#PBF | 功能描述:IC INTEGER-N PLL W/VCO 28-QFN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 频率合成器 PLL:是 输入:晶体 输出:时钟 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/无 频率 - 最大:1GHz 除法器/乘法器:是/无 电源电压:4.5 V ~ 5.5 V 工作温度:-20°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-LSSOP（0.175"，4.40mm 宽） 供应商设备封装:16-SSOP 包装:带卷 (TR) 其它名称:NJW1504V-TE1-NDNJW1504V-TE1TR |
| LTC6946IUFD-3#TRPBF | 功能描述:IC INTEGER-N PLL W/VCO 28QFN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| LTC6946-x | 制造商:LINER 制造商全称:Linear Technology 功能描述:16-Bit, 20Msps Low Noise Dual ADC |
| LTC694C | 制造商:LINER 制造商全称:Linear Technology 功能描述:Microprocessor Supervisory Circuits |
| LTC694C-3.3 | 制造商:LINER 制造商全称:Linear Technology 功能描述:3.3V Microprocessor Supervisory Circuits |
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