参数资料
| 型号： | LV5768M-TLM-H |
| 厂商： | ON Semiconductor |
| 文件页数： | 14/15页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM MFP14S |
| 标准包装： | 1,000 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 500kHz |
| 占空比： | 95% |
| 电源电压： | 8.5 V ~ 42 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | * |
| 包装： | * |
LV5768M
? Caution for pattern layout
C1: input capacitor
When the IC performs switching, ripple current flows into the input capacitor of DC-DC converter. The capacitor of
input should be connected adjacent to the power IC and minimize the inductance from pattern layout. C1 should be
connected adjacently to VIN pin of the IC and Q1 (high side FET- drain). If implementation to IC side is not feasible,
insert adjacently to Q1.
C7 (bypass capacitor connected to VIN pin of the IC) should be connected adjacently to VIN pin and GND pin. In
rare cases, intensive ringing may occur in the VIN pin by connecting bypass capacitor. The recommendation value is
1000pF.
Q1, Q2 (D1): external FET
Both high and low sides are driven by Nch-MOSFET. In Q1, a transition of SW node takes place between VIN and
GND by turn on and off, where high frequency noise occurs. The noise affects the surrounding pattern layouts and
parts. The high/ low side gate and SW node should be laid out as fat and short as possible without connecting all the
way to HDRV, LDRV and SW pins of the IC. HDRV, LDRV and SW pins should be shielded with GND to prevent
influence from noise.
When high side FET is turned on, current path is as follows: VIN + (C1) --> inductor (L) --> VOUT (load) -->
PGND --> GND. When low side FET is turned on, current path is as follows: inductor (L) --> VOUT (load) -->
PGND. By minimizing the area of current path and keeping the pattern layout fat and short, noise is eliminated and
error operation is prevented. Hence, Q1, Q2, D1, C1 and C9 should be implemented nearby.
R5,C6: ILIM (overcurrent limiter set pin)
ILIM pin detects overcurrent which is used as set point where current limit comparator in the IC starts operation. The
overcurrent limiter is adjustable by the resistor between ILIM pin and VIN pin. When the voltage of SW pin
becomes lower than that of ILIM pin, current limit comparator functions and turns off the high side MOSFET. This
operation is reset at every PWM pulse.
To filter unwanted noise, C6 should be connected in parallel to the set resistor (the recommendation is 1000pF). R5
and C6 should be implemented adjacently to the VIN side of the IC. If they are apart from the VIN side, detection
precision for overcurrent point may be deteriorated.
Small signal system: part for FB, COMP, EN, CBOOT, VDD and SS pins.
The parts should be implemented adjacently to the IC and be connected as short as possible. Also the GND of the
parts should have common GND pattern as the IC. FB pattern layout should not be under nor nearby the inductor or
SW node. This must be complied to avoid error operation.
PS No.A1988-14/15
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| LV5768V-A-MPB-E | 功能描述:直流/直流开关调节器 RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
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