参数资料
型号: LX1675ILQ-TR
厂商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分类: 稳压器
英文描述: 1.5 A SWITCHING CONTROLLER, 690 kHz SWITCHING FREQ-MAX, PQCC38
封装: 5 X 7 MM, ROHS COMPLIANT, PLASTIC, MLPQ-38
文件页数: 13/19页
文件大小: 324K
代理商: LX1675ILQ-TR
LX1675
PRODUCTION DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 3
Copyright
2004
Rev. 1.2a, 2006-02-16
WWW
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Multiple Output LoadSHARE PWM
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FUNCTIONAL PIN DESCRIPTION
Name
Description
FB1
Bi-Phase Operation: Phase 1 and 2 Voltage Feedback
Single Phase Operation: Phase 1 Voltage Feedback, connect to the output through a resistor network to set desired
output voltage of Phase 1.
FB2
Bi-Phase Operation: Load Sharing Voltage Sense Feedback – Connect filtered phase 2 switching output (pre-inductor)
to FB2 to ensure proper current sharing between phase 1 and phase 2. Single Phase Operation: Phase 2 Voltage
Feedback, connect to the output through a resistor network to set desired output voltage of Phase 2.
FB3
Phase 3 Voltage Feedback , connect to the output through a resistor network to set desired output voltage of Phase 3.
RF2
Bi-Phase Operation: Load Sharing Voltage Sense Feedback Reference – Sets reference for current sharing control
loop. Connecting filtered phase 1 switching output (pre-inductor) to RF2 forces the average current in
phase 2 to be equal to phase 1. Single Phase Operation: Phase 2 Voltage Reference – connected to SS2 pin
as the reference.
EOX
Error Amplifier Output – Sets external compensation for the corresponding phase denoted by “X”.
VIN
Controller supply voltage.
VCCL
For 4.5V < VIN < 6V, this pin becomes the input voltage supply for the controller’s internal logic and gate drivers. For
VIN > 6V this pin is an output of the internal 5V regulator that supplies internal logic, Low Side Gate drivers and High
Side charge pump capacitor charging, if used. User must provide low ESR decoupling capacitor for pulse load currents
AGND
Analog ground reference.
DGND
Digital/Switching ground reference for current paths of the PWM driver circuits.
VSLR
Supply pin for LDO regulator section.
LDFB
Low Dropout Regulator Voltage Feedback – Sets the output voltage of external MOSFET via resistor network.
LDGD
Low Dropout Regulator Gate Drive – Connects to gate of external N-MOSFET for linear regulator supply.
SSL
LDO Enable and Soft-start/Hiccup Capacitor Pin - During start-up, the voltage on this pin ramps from 0V to VREF
controlling the output voltage of the regulator. An internal 20k
resistor connected to VREF and the external capacitor
set the time constant for soft-start function. The Soft-start function does not initialize until the supply voltage exceeds the
UVLO threshold.
SF
Shared Fault - If SF input = Logic 1(VCCL) and current limit threshold is reached during 4 clock cycles all outputs are
shutdown by discharging SS caps to zero and the start-up sequence begins again, this becomes hiccup mode protection
with the duty cycle set by the size of the SS capacitor. When operated in Bi-phase mode, SF must be set High. If SF =
logic 0, the other outputs continue to function normally and the faulted output enters the hiccup mode for current limit.
FS
Frequency Select Logic Input - Connect to ground for 300KHz and VCCL for 600KHz operation. Input has 100K
Pull
down resistor.
VREF
Buffered version of the internal 0.8 voltage reference.
CSX
Over-Current Limit Set – Connecting a resistor between CSX pin and the drain of the low-side MOSFET sets the current-
limit threshold for the corresponding phase denoted by “X”. A minimum of 500
must be in series with
this input. Whenever the current limit threshold is reached for 4 consecutive clock cycles the soft start capacitor is
discharged through an internal resistor initiating Soft Start and Hiccup mode.
SSX
Enable & Soft-start/Hiccup Capacitor Pin – During start-up, the voltage on this pin controls the output voltage of its
respective regulator. An internal 20k
resistor and the external capacitor set the time constant for soft-start function.
The Soft-start function does not initialize until the supply voltage exceeds the UVLO threshold. When an over-current
condition occurs, this capacitor is used for the timing of hiccup mode protection. Pulling the SS pin below 0.1V disables
the corresponding phase denoted by “X”.
VCX
PWM High-Side MOSFET Gate Driver Supply – Connect to separate supply or to boot strap supply to ensure proper
high-side gate driver supply voltage. “X” denotes corresponding phase. If the phase is not used connect
to VCC.
HOX
High Side MOSFET Gate Driver – “X” denotes corresponding phase.
LOX
Low Side MOSFET Gate Driver – “X” denotes corresponding phase.
PGX
Low-side Driver Power Ground. Connects to the source of the bottom N-channel MOSFETS of each phase, where X
denotes corresponding phase. PG1 is the shared ground of PWM 1 and PWM 2 Low-side drivers.
HRX
High Side driver return, connect this pin to High Side MOSFET source. “X” denotes corresponding phase.
PP
AA
CC
KK
AA
GG
EE
DD
AA
TT
AA
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