参数资料
型号: LX1675ILQ-TR
厂商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分类: 稳压器
英文描述: 1.5 A SWITCHING CONTROLLER, 690 kHz SWITCHING FREQ-MAX, PQCC38
封装: 5 X 7 MM, ROHS COMPLIANT, PLASTIC, MLPQ-38
文件页数: 8/19页
文件大小: 324K
代理商: LX1675ILQ-TR
LX1675
PRODUCTION DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 16
Copyright
2004
Rev. 1.2a, 2006-02-16
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Multiple Output LoadSHARE PWM
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APPLICATION NOTE ( C ONTINU ED)
OUTPUT ENABLE
The LX1675 MOSFET driver outputs are shut off by pulling
the soft-start pin below 0.1V.
The LDO voltage regulator has its own soft-start pin: SSL, that
is the same as any of the other switching phases for control of its
output voltage shut down.
PROGRAMMING THE OUTPUT VOLTAGE
The output voltage is sensed by the feedback pin (FBX) which
is compared to a 0.8V reference. The output voltage can be set to
any voltage above 0.8V (and lower than the input voltage) by
means of a resistor divider R1-R2 (see Figure 1).
)
/R
R
(1
V
2
1
REF
OUT
+
=
Note: This equation is simplified and does not account for
error amplifier input current. Keep R1 and R2 close to 1kΩ (order
of magnitude).
AN 18
For more information see Microsemi Application Note 1307:
LX1671 Product design Guide
. The LX1675 and LX1671 have
the same functionality and this information will be applicable.
DDR VTT TERMINATION VOLTAGE
Double Data Rate (DDR) SDRAM requires a termination
voltage (VTT) in addition to the line driver supply voltage (VDDQ)
and receiver supply voltage (VDD).
Although it is not a
requirement VDD is generally equal to VDDQ so that only VTT and
VDDQ are required.
The LX1675 can supply both voltages by using two of the three
PWM phases. Since the currents for VTT and (VDD plus VDDQ)
are quite often several amps, (2A to 6A is common) a switching
regulator is a logical choice
VTT for DDR memory can be generated with the LX1675 by
using the positive input of the phase 2 error amplifier RF2 as a
reference input from an external reference voltage VREF which is
defined as one half of VDDQ. Using VREF as the reference input
will insure that all voltages are correct and track each other as
specified in the JEDEC (EIA/JESD8-9A) specification. The phase 2
output will then be equal to VREF and track the VDDQ supply as
required.
When an external reference is used the Soft Start will not be
functional for that phase
See Microsemi Application Note 1306: DDR SDRAM Memory
Termination
for more details.
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