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参数资料
| 型号： | M28F102 |
| 厂商： | 意法半导体 |
| 英文描述： | 1 Mbit (128Kb x8, Bulk) Flash Memory(1M位闪速存储器) |
| 中文描述： | 1兆位（128KB的× 8，散装）闪存（100万位闪速存储器） |
| 文件页数： | 16/20页 |
| 文件大小： | 147K |
| 代理商： | M28F102 |
followed by writing a valid command to the the
command register (for example Read).
PRESTOF ERASEALGORITHM
The PRESTO F Erase Algorithm guarantees that
the device will be erased in a reliable way. The
algorithmfirst programsall wordsto0000hin order
to ensure uniform erasure. The programming fol-
lows the Presto F Programming Algorithm (see
below). Erase is set-up by writing ’xx20h’ to the
commandregister,theerasureisstartedbyrepeat-
ingthiswritecycle. EraseVerifyis set-upbywriting
’xxA0h’to thecommand register togetherwith the
addressof thewordtobe verified.The subsequent
read cycle reads the data which is compared to
0FFFFh.EraseVerifybeginsataddress0000hand
continuesto the last address or untilthe compari-
son of the data to 0FFFFh fails. If this occurs, the
address of the last word checked is stored and a
newErase operationperformed.Erase Verifythen
continuesfrom the addressof the storedlocation.
PRESTOF PROGRAMALGORITHM
The PRESTO F ProgrammingAlgorithmapplies a
series of 10
μ
s programmingpulses to a worduntil
a correct verify occurs. Up to 25 programming
operations are allowed for one word. Program is
set-up by writing ’xx40h’ to the commandregister,
the programming is started after the next write
cycle which also latches the address and data to
beprogrammed.ProgramVerifyisset-upbywriting
’xxC0h’tothecommandregister,followedbyaread
cycle and a compare of the data read to the data
expected.DuringProgramand ProgramVerifyop-
erations a MARGIN MODE circuit is activated to
guaranteethatthe cellis programmedwithasafety
margin.
PROGRAM
ALL
BYTES TO 0000h
AI00636
n=0, Addr=0000h
Last
Addr
ERASE SET-UP
Wait 10ms
ERASE VERIFY
Latch Addr.
READ DATA OUTPUT
Data
OK
Wait 6
μ
s
++n
LIMIT
Addr++
READ COMMAND
VPP= 12V
VPP<
6.5V
FAIL
VPP< 6.5V, PASS
YES
NO
YES
NO
YES
NO
Figure 12. ErasingFlowchart
AI00677
n = 0
Last
Addr
PROGRAM VERIFY
Wait 10
μ
s
PROGRAM SET-UP
Latch Addr, Data
READ DATA OUTPUT
Data
OK
Wait 6
μ
s
++n
= 25
Addr++
READ COMMAND
VPP= 12V
VPP<
6.5V
FAIL
VPP< 6.5V, PASS
YES
NO
YES
NO
YES
NO
Figure 13. ProgrammingFlowchart
Limit:
1000 at grade 1; 6000 atgrades 3 & 6.
16/20
M28F102
相关PDF资料 |
PDF描述 |
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| M28F220 | 2Mbit (256Kb x8 or 128Kb x16, Boot Block) Flash Memory(2Mb闪速存储器) |
| M28F256 | 256 Kbit (32Kb x8, Bulk) Flash Memory(256K位闪速存储器) |
| M28F410 | 4 Mbit (512Kb x8 or 256Kb x16, Boot Block) Flash Memory(4M位(512Kx8/256K x16）闪速存储器) |
| M28F411 | 4 Mbit (512Kb x8, Boot Block) Flash Memory(4M位闪速存储器) |
| M28F420 | 4Mbit (512Kb x8 or 256Kb x16, Boot Block) Flash Memory(4Mb闪速存储器) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M28F201 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120K1 | 功能描述:闪存 PLCC-32 256KX8 120NS RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| M28F201-120K1R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120K1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120K3R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
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