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参数资料
| 型号： | M34571GD-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO24 |
| 封装： | 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24 |
| 文件页数： | 14/33页 |
| 文件大小： | 1526K |
| 代理商： | M34571GD-XXXFP |
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Rev.1.02
May 25, 2007
Page 19 of 124
REJ03B0179-0102
4571 Group
(6) Interrupt control registers
Interrupt control register V1
Interrupt enable bits of external 0, external 1, timer 1 and timer 2
are assigned to register V1. Set the contents of this register
through register A with the TV1A instruction. The TAV1
instruction can be used to transfer the contents of register V1 to
register A.
Interrupt control register V2
The voltage drop detection circuit interrupt enable bit and timer 3
interrupt enable bit are assigned to register V2. Set the contents
of this register through register A with the TV2A instruction. The
TAV2 instruction can be used to transfer the contents of register
V2 to register A.
Note 1.“R” represents read enabled, and “W” represents write enabled.
Table 13 Interrupt control registers
Interrupt control register V1
at reset : 00002
at RAM back-up : 00002
R/W
TAV1/TV1A
V13
Timer 2 interrupt enable bit
0
Interrupt disabled (SNZT2 instruction is valid)
1
Interrupt enabled (SNZT2 instruction is invalid)
V12
Timer 1 interrupt enable bit
0
Interrupt disabled (SNZT1 instruction is valid)
1
Interrupt enabled (SNZT1 instruction is invalid)
V11
External 1 interrupt enable bit
0
Interrupt disabled (SNZ1 instruction is valid)
1
Interrupt enabled (SNZ1 instruction is invalid)
V10
External 0 interrupt enable bit
0
Interrupt disabled (SNZ0 instruction is valid)
1
Interrupt enabled (SNZ0 instruction is invalid)
Interrupt control register V2
at reset : 00002
at RAM back-up : 00002
R/W
TAV2/TV2A
V23
Voltage drop detector interrupt enable bit
0
Interrupt disabled (SNZVD instruction is valid)
1
Interrupt enabled (SNZVD instruction is invalid)
V22
Not used
0
This bit has no function, but read/write is enabled.
1
V21
Not used
0
This bit has no function, but read/write is enabled.
1
V20
Timer 3 interrupt enable bit
0
Interrupt disabled (SNZT3 instruction is valid)
1
Interrupt enabled (SNZT3 instruction is invalid)
相关PDF资料 |
PDF描述 |
|---|---|
| M34571G6-XXXFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO24 |
| M34571GDFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO24 |
| M34571G4FP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO24 |
| M34571G6FP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO24 |
| M35015-XXXSP | 24 X 10 CHARACTERS CRT CHAR DSPL CTLR, PDIP20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
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| M34583MD-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34584EDFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34584MD-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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