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参数资料
| 型号： | M35080FP |
| 元件分类： | 显示控制器 |
| 英文描述： | 128 X 96 DOTS CRT CHAR OR GRPH DSPL CTLR, PDSO24 |
| 封装： | 0.300 INCH, 0.80 MM PITCH, SSOP-24 |
| 文件页数： | 29/30页 |
| 文件大小： | 304K |
| 代理商： | M35080FP |
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MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
5
DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
100016
100116
100216
100316
100416
100516
100616
100716
100816
100916
100A16
120616
120716
120816
12F916
12FA16
12FB16
12FC16
12FD16
12FE16
12FF16
130016
13FF16
Address
Fig.2 Memory constitution (Bit map RAM (R0))
Dot composition (DAF to DA0)
at 128 dots 96 dots
………
Bit map RAM (R0) data
unused area
Dot 1 to 16 of line 1
Dot 17 to 32 of line 1
Dot 33 to 48 of line 1
Dot 49 to 64 of line 1
Dot 65 to 80 of line 1
Dot 81 to 96 of line 1
Dot 97 to 112 of line 1
Dot 113 to 128 of line 1
Dot 1 to 16 of line 2
Dot 17 to 32 of line 2
Dot 33 to 48 of line 2
Dot 81 to 96 of line 95
Dot 97 to 112 of line 95
Dot 113 to 128 of line 95
Dot 1 to 16 of line 96
Dot 17 to 32 of line 96
Dot 33 to 48 of line 96
Dot 49 to 64 of line 96
Dot 65 to 80 of line 96
Dot 81 to 96 of line 96
Dot 97 to 112 of line 96
………
Notes : Bit map RAM (Addresses 100016 to 3AFF16) has 2-page composition of the memory for page A, and the memory for page B.
When write data in the memory for page A, and write data in the memory for page B, set it as register PAGEONA = “1” at register PAGEONB = “1.”
When both of PAGEONA and PAGEONB are set to “1”, data can be simultaneously written in both the memory for page A, and the memory for page B.
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