参数资料
型号: M37542F8VGP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP32
封装: 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件页数: 46/139页
文件大小: 1448K
代理商: M37542F8VGP
7542 Group
Rev.3.02
Oct 31, 2006
Page 14 of 134
REJ03B0006-0302
Execute JSR
On-going Routine
M (S)
(PCH)
(S)
(S – 1)
M (S)
(PCL)
Execute RTS
(PCL)M (S)
(S)
(S – 1)
(S)
(S + 1)
(S)
(S + 1)
(PCH)M (S)
Subroutine
Restore Return
Address
Store Return Address
on Stack
M (S)
(PS)
Execute RTI
(PS)
M (S)
(S)
(S – 1)
(S)
(S + 1)
Interrupt
Service Routine
Restore Contents of
Processor Status Register
M (S)
(PCH)
(S)
(S – 1)
M (S)
(PCL)
(S)
(S – 1)
(PCL)M (S)
(S)
(S + 1)
(S)
(S + 1)
(PCH)M (S)
Restore Return
Address
I Flag “0” to “1”
Fetch the Jump Vector
Store Return Address
on Stack
Store Contents of Processor
Status Register on Stack
Interrupt request
(Note)
Note : The condition to enable the interrupt
Interrupt enable bit is “1”
Interrupt disable flag is “0”
Table 4 Push and pop instructions of accumulator or processor status register
Accumulator
Processor status register
Push instruction to stack
PHA
PHP
Pop instruction from stack
PLA
PLP
Fig. 12 Register push and pop at interrupt generation and subroutine call
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