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参数资料
| 型号： | M37544G2SP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP32 |
| 封装： | 0.400 INCH, 1.78 MM PITCH, PLASTIC, SDIP-32 |
| 文件页数： | 24/68页 |
| 文件大小： | 738K |
| 代理商： | M37544G2SP |
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7544 Group
Rev.1.04
2004.06.08
page 30 of 66
REJ03B0012-0104Z
Fig. 32 Structure of serial I/O-related registers
b7
Transmit buffer empty flag (TBE)
0: Buffer full
1: Buffer empty
Receive buffer full flag (RBF)
0: Buffer empty
1: Buffer full
Transmit shift completion flag (TSC)
0: Transmit shift in progress
1: Transmit shift completed
Overrun error flag (OE)
0: No error
1: Overrun error
Parity error flag (PE)
0: No error
1: Parity error
Framing error flag (FE)
0: No error
1: Framing error
Summing error flag (SE)
0: (OE) U (PE) U (FE)=0
1: (OE) U (PE) U (FE)=1
Disable (returns “1” when read)
Serial I/O status register
Serial I/O control register
b0
BRG count source selection bit (CSS)
0: f(XIN)
1: f(XIN)/4
Serial I/O synchronous clock selection bit (SCS)
0: BRG output divided by 4 when clock synchronous
serial I/O is selected, BRG output divided by 16
when UART is selected.
1: External clock input when clock synchronous serial
I/O is selected, external clock input divided by 16
when UART is selected.
SRDY output enable bit (SRDY)
0: P13 pin operates as ordinary I/O pin
1: P13 pin operates as SRDY output pin
Transmit interrupt source selection bit (TIC)
0: Interrupt when transmit buffer has emptied
1: Interrupt when transmit shift operation is completed
Transmit enable bit (TE)
0: Transmit disabled
1: Transmit enabled
Receive enable bit (RE)
0: Receive disabled
1: Receive enabled
Serial I/O mode selection bit (SIOM)
0: Clock asynchronous (UART) serial I/O
1: Clock synchronous serial I/O
Serial I/O enable bit (SIOE)
0: Serial I/O disabled
(pins P10 to P13 operate as ordinary I/O pins)
1: Serial I/O enabled
(pins P10 to P13 operate as serial I/O pins)
b7
UART control register
Character length selection bit (CHAS)
0: 8 bits
1: 7 bits
Parity enable bit (PARE)
0: Parity checking disabled
1: Parity checking enabled
Parity selection bit (PARS)
0: Even parity
1: Odd parity
Stop bit length selection bit (STPS)
0: 1 stop bit
1: 2 stop bits
P11/TXD1 P-channel output disable bit (POFF)
0: CMOS output (in output mode)
1: N-channel open drain output (in output mode)
Disable (return “1” when read)
b0
(SIOSTS : address 001916, initial value: 0016)
(SIOCON : address 001A16, initial value: 0016)
(UARTCON : address 001B16, initial value: E016)
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