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参数资料
| 型号： | M37544G2SP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP32 |
| 封装： | 0.400 INCH, 1.78 MM PITCH, PLASTIC, SDIP-32 |
| 文件页数： | 7/68页 |
| 文件大小： | 738K |
| 代理商： | M37544G2SP |
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7544 Group
Rev.1.04
2004.06.08
page 15 of 66
REJ03B0012-0104Z
I/O Ports
[Direction registers] PiD
The I/O ports have direction registers which determine the input/
output direction of each pin. Each bit in a direction register corre-
sponds to one pin, and each pin can be set to be input or output.
When “1” is set to the bit corresponding to a pin, this pin becomes
an output port. When “0” is set to the bit, the pin becomes an in-
put port.
When data is read from a pin set to output, not the value of the pin
itself but the value of port latch is read. Pins set to input are float-
ing, and permit reading pin values.
If a pin set to input is written to, only the port latch is written to and
the pin remains floating.
[Pull-up control register] PULL
By setting the pull-up control register (address 001616), ports P0
and P3 can exert pull-up control by program. However, pins set to
output are disconnected from this control and cannot exert pull-up
control.
[Port P1P3 control register] P1P3C
By setting the port P1P3 control register (address 001716), a
CMOS input level or a TTL input level can be selected for ports
P10, P12, P34, and P37 by program.
Fig. 16 Structure of port P1P3 control register
Fig. 15 Structure of pull-up control register
Pull-up control register
(PULL: address 001616, initial value: 0016)
P00 pull-up control bit
P01 pull-up control bit
P02, P03 pull-up control bit
P04 – P07 pull-up control bit
P30 – P33 pull-up control bit
P34 pull-up control bit
Disable
P37 pull-up control bit
b7
b0
0 : Pull-up Off
1 : Pull-up On
Note : Pins set to output ports are disconnected from pull-up control.
Port P1P3 control register
(P1P3C: address 001716, initial value: 0016)
b7
b0
P37/INT0 input level selection bit
0 : CMOS level
1 : TTL level
P34/INT1 input level selection bit
0 : CMOS level
1 : TTL level
P10,P12 input level selection bit
0 : CMOS level
1 : TTL level
Disable
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