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参数资料
| 型号： | M37545G4-XXXGP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP32 |
| 封装： | 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32 |
| 文件页数： | 42/65页 |
| 文件大小： | 782K |
| 代理商： | M37545G4-XXXGP |
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Rev.1.07
Mar 19, 2009
Page 45 of 60
REJ03B0140-0107
7545 Group
NOTES ON USE
Countermeasures Against Noise
1. Shortest wiring length
(1) Package
Select the smallest possible package to make the total wiring
length short.
<Reason>
The wiring length depends on a microcomputer package. Use of
a small package, for example QFP and not DIP, makes the total
wiring length short to reduce influence of noise.
Fig. 48 Selection of packages
(2) Wiring for RESET pin
Make the length of wiring which is connected to the RESET pin
as short as possible. Especially, connect a capacitor across the
RESET pin and the VSS pin with the shortest possible wiring
(within 20 mm).
<Reason>
The width of a pulse input into the RESET pin is determined by
the timing necessary conditions. If noise having a shorter pulse
width than the standard is input to the RESET pin, the reset is
released before the internal state of the microcomputer is
completely initialized. This may cause a program runaway.
Fig. 49 Wiring for the RESET pin
(3) Wiring for clock input/output pins
Make the length of wiring which is connected to clock I/O pins
as short as possible.
Make the length of wiring (within 20 mm) across the
grounding lead of a capacitor which is connected to an
oscillator and the VSS pin of a microcomputer as short as
possible.
Separate the VSS pattern only for oscillation from other VSS
patterns.
<Reason>
If noise enters clock I/O pins, clock waveforms may be
deformed. This may cause a program failure or program
runaway. Also, if a potential difference is caused by the noise
between the VSS level of a microcomputer and the VSS level of
an oscillator, the correct clock will not be input in the
microcomputer.
Fig. 50 Wiring for clock I/O pins
(4) Wiring to CNVSS pin
Connect CNVSS pin to a GND pattern at the shortest distance.
The GND pattern is required to be as close as possible to the
GND supplied to VSS.
In order to improve the noise reduction, to connect a 5 k
resistor serially to the CNVSS pin - GND line may be valid.
As well as the above-mentioned, in this case, connect to a GND
pattern at the shortest distance. The GND pattern is required to
be as close as possible to the GND supplied to VSS.
<Reason>
The CNVSS pin of the QzROM is the power source input pin for
the built-in QzROM. When programming in the built-in
QzROM, the impedance of the CNVSS pin is low to allow the
electric current for writing flow into the QzROM. Because of
this, noise can enter easily. If noise enters the CNVSS pin,
abnormal instruction codes or data are read from the built-in
QzROM, which may cause a program runaway.
Fig. 51 Wiring for the VPP pin of the QzROM
DIP
SDIP
SOP
QFP
RESET
Reset
circuit
Noise
VSS
Reset
circuit
VSS
RESET
VSS
N.G.
O.K.
Noise
XIN
XOUT
VSS
XIN
XOUT
VSS
N.G.
O.K.
About 5k
VSS
The shortest
CNVSS
(Note)
Note: This indicates pin.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M37545G6GP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37545G6GP#U0 | 功能描述:MCU 3/5V 24K 32-LQFP QZ-ROM RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 标准包装:250 系列:80C 核心处理器:8051 芯体尺寸:8-位 速度:16MHz 连通性:EBI/EMI，I²C，UART/USART 外围设备:POR，PWM，WDT 输入/输出数:40 程序存储器容量:- 程序存储器类型:ROMless EEPROM 大小:- RAM 容量:256 x 8 电压 - 电源 (Vcc/Vdd):4.5 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:68-LCC（J 形引线） 包装:带卷 (TR) |
| M37545G6KP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37545G6-XXXGP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37545G8GP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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