
7702/7703 Group User’s Manual
7–35
SERIAL I/O
7.4 Clock asynchronous serial I/O (UART) mode
Table 7.4.1 lists the performance overview in the UART mode, and Table 7.4.2 lists the functions of
I/O pins in this mode.
Table 7.4.1 Performance overview in UART mode
Item
Transfer data
format
Transfer rate
Error detection
Start bit
Character bit (Transfer data)
Parity bit
Stop bit
When selecting internal clock
When selecting external clock
Functions
1 bit
7 bits, 8 bits, or 9 bits
0 bit or 1 bit (Odd or even can be selected.)
1 bit or 2 bits
Clock of BRGi output divided by 16
Maximum 312.5 kbps (f(XIN) = 25 MHz)
Maximum 250 kbps (f(XIN) = 16 MHz)
Maximum 125 kbps (f(XIN) = 8 MHz)
4 types (Overrun, Framing, Parity, and Summing)
Presence of error can be detected only by checking error sum flag.
Table 7.4.2 Functions of I/O pins in UART mode
Method of selection
Fixed
Port P8 direction register
U1’s corresponding bit = “0”
Internal/External clock select bit
U2 = “1”
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CTS/RTS select bitU3 = “0”
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CTS/RTS select bit = “1”
Pin name
TxDi (P83, P87)
RxDi (P82, P86)
CLKi (P81, P85)
___
CTSi/RTSi (P80, P84)
Functions
Serial data output
Serial data input
BRGi’s count source
input
____
CTS input
____
RTS output
Port P8 direction registerU1: Address 1416
Internal/External clock select bitU2: bit 3 at addresses 3016, 3816
____ ____
CTS/RTS select bit
U3: bit 2 at addresses 3416, 3C16
Notes 1: The TxDi pin outputs “H” level while not transmitting after selecting UARTi’s operating mode.
2: The RxDi pin can be used as a programmable I/O port when performing only transmission.
3: The CLKi pin can be used as a programmable I/O port when selecting internal clock.
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4: The CTSi/RTSi pin can be used as a input port when performing only reception and not using RTS
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function (when selecting CTS function).