
CENTRAL PROCESSING UNIT (CPU)
7702/7703 Group User’s Manual
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2.5.3 Setting processor modes
The voltage supplied to the CNVss pin and the processor mode bits (bits 1 and 0 at address 5E16) set the
processor mode.
qWhen Vss level is supplied to CNVss pin
After a reset, the microcomputer starts operating in the single-chip mode. The processor mode is switched
by the processor mode bits after the microcomputer starts operating. When the processor mode bits are
set to “012,” the microcomputer enters the memory expansion mode; when these bits are set to “102,”
the microcomputer enters the microprocessor mode.
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The processor mode is switched at the rising edge of signal E after writing to the processor mode bits.
Figure 2.5.3 shows the timing when pin functions are switched by switching the processor mode from the
single-chip mode to the memory expansion or microprocessor mode with the processor mode bits.
When the processor mode is switched during the program execution, the contents of the instruction
queue buffer is not initialized. (Refer to “Appendix 6. Q & A.”)
qWhen Vcc level is supplied to CNVss pin
After a reset, the microcomputer starts operating in the microprocessor mode. In this case, the microcomputer
cannot operate in the other modes. (Fix the processor mode bits to “102.”)
Table 2.5.2 lists the methods for setting processor modes. Figure 2.5.4 shows the structure of processor
mode register (address 5E16).
2.5 Processor modes
External address bus A0
P00
E
Written to processor mode bits
Programmable I/O port P00
Note: Functions of pins P01 to P07, P1 to P3, P40 to P42 are switched at the same timing shown above.
Function of pin P42 is, however, switched only when the processor mode is switched to the
microprocessor mode.
Fig. 2.5.3 Timing when pin functions are switched