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参数资料
| 型号： | M38C29FFAFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 5 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64 |
| 文件页数： | 3/104页 |
| 文件大小： | 1327K |
| 代理商： | M38C29FFAFP |
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Rev.2.00
May 28, 2004
page 98 of 100
38C2 Group (A Version)
9. Transmit and receive operation in clock synchronous serial I/O
mode
When stopping transmitting and receiving operations in the clock
synchronous serial I/O mode, set the receive enable bit and the trans-
mit enable bit to “0” simultaneously. If only one of them is stopped the
receive or transmit operation may loose synchronization, causing a
bit slippage.
Notes on Serial I/O2
1. Switching synchronous clock
When switching the synchronous clock by the serial I/O2 mode se-
lection bit (bit 6 of serial I/O2 control register (address 0FE316)), ini-
tialize the serial I/O2 counter (write data to transmit/receive buffer
register 2 (address 001E16)).
2. Notes when selecting external clock
When an external clock is selected as the synchronous clock, the
TxD2 pin holds the output level of D7 after transmission is completed.
However, if the clock is input to the serial I/O continuously, the trans-
mit/receive buffer register continue the shift operation and output data
from the TxD2 pin continuously.
A write operation to the transmit/receive buffer register 2 must be
performed when the SCLK2 pin is “ H” .
When the internal clock is selected as the synchronous clock, the
TxD2 pin holds the high-impedance state after transmission.
Notes on Programming for Serial I/O
In clock synchronous serial I/O, if the receive side is using an exter-
nal clock and it is to output the SRDY signal, set the transmit enable
bit, the receive enable bit, and the SRDY output enable bit to “ 1.”
Serial I/O continues to output the final bit from the TXD pin after trans-
mission is completed.
Notes on A-D Converter
1. Analog input pin
Make the signal source impedance for analog input low, or equip an
analog input pin with an external capacitor of 0.01
F to 1 F. Fur-
ther, be sure to verify the operation of application products on the
user side.
<Reason>
An analog input pin includes the capacitor for analog voltage com-
parison. Accordingly, when signals from signal source with high im-
pedance are input to an analog input pin, charge and discharge noise
generates. This may cause the A-D conversion precision to be worse.
2. Read A-D conversion register
How to read the A-D conversion register at 10-bit A-D conversion
and 8-bit A-D conversion is shown in Fig. 8.
10-bit reading
(Read address 001B16 before 001A16)
A-D conversion register 1
(Address 001B16)
A-D conversion register 2
(Address 001A16)
8-bit reading
(Read only address 001B16)
(Address 001B16)
b0
b7
b0
b1
* VREF input switch bit
b9 b8 b7b6 b5 b4b3b2
b7
b0
b9 b8 b7b6 b5 b4b3b2
b7
b0
*
(high-order)
(low-order)
Note : The bit 5 to bit 1 of address 001A16 become “0” at reading.
Also, bit 0 is undefined at reading.
1: ON
0: ON only during A-D conversion
Fig. 8 A-D conversion register reading
3. Analog power source input pin AVss
The AVss pin is an analog power source input pin. Regardless of
using the A-D conversion function or not, connect it as following :
AVSS : Connect to the VSS line
<Reason>
If the AVss pin is opened, the microcomputer may have a failure be-
cause of noise or others.
4. Reference voltage input pin VREF
Connect an approximately 1000 pF capacitor across the AVss pin
and the VREF pin. Besides, connect the capacitor across the VREF
pin and the AVss pin at equal length as close as possible.
5. Clock frequency during A-D conversion
Use the A-D converter in the following conditions:
Select XIN-XOUT as system clock
φ by the system clock selection bit
(bit 7 of CPU mode register (address 003B16)). When selecting XCIN-
XCOUT as system clock
φ, the A-D conversion function cannot be
used.
f(XIN) is 500 kHz or more.
Do not execute the STP or WIT instruction during A-D conversion.
<Reason>
The comparator consists of a capacity coupling, and a charge of the
capacity will be lost if the clock frequency is too low. This may cause
the A-D conversion precision to be worse.
6. Write to A-D conversion completion bit durng A-D conversion
When “0” is set to the A-D conversion completion bit by the program
during A-D conversion, re-conversion is performed.
7. Write during A-D conversion
The A-D converter will not operate normally if one of the following
operation is applied during the A-D conversion:
Writing to CPU mode register
Writing to A-D control register
8. Notes on programming for A-D conversion
The comparator uses internal capacitors whose charge will be lost if
the clock frequency is too low. Therefore, set the A-D clock frequency
to 250 kHz or more. Also, when the STP instruction is executed dur-
ing the A-D conversion, the A-D conversion is stopped immediately,
the A-D conversion completion bit is set to “1”, and the interrupt re-
quest is generated.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M38C29FFAFP#U0 | 功能描述:IC 740/38C2 MCU FLASH 64LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 产品培训模块:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 标准包装:1 系列:M16C™ M32C/80/87 核心处理器:M32C/80 芯体尺寸:16/32-位 速度:32MHz 连通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外围设备:DMA，POR，PWM，WDT 输入/输出数:121 程序存储器容量:384KB（384K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:24K x 8 电压 - 电源 (Vcc/Vdd):3 V ~ 5.5 V 数据转换器:A/D 34x10b，D/A 2x8b 振荡器型:内部 工作温度:-20°C ~ 85°C 封装/外壳:144-LQFP 包装:托盘 产品目录页面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87 |
| M38C29FFAHP | 制造商:Renesas Electronics Corporation 功能描述:MCU 3/5V 60K 64-LQFP - Trays |
| M38C29FFAHP#U0 | 制造商:Renesas Electronics Corporation 功能描述:MCU 8BIT 740 CISC 60KB FLASH 5V 64LQFP - Trays |
| M38C29FFFP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38C29FFHP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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