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参数资料
| 型号： | M38D5XGXHP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 6.25 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件页数： | 82/142页 |
| 文件大小： | 2004K |
| 代理商： | M38D5XGXHP |
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Rev.3.04
May 20, 2008
REJ03B0158-0304
38D5 Group
SERIAL INTERFACE
SERIAL I/O1
Serial I/O1 can be used as either clock synchronous or
asynchronous (UART) serial I/O. A dedicated timer is also
provided for baud rate generation.
(1) Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O1 mode can be selected by setting
the serial I/O mode selection bit of the serial I/O1 control register
to “1”.
For clock synchronous serial I/O1, the transmitter and the
receiver must use the same clock. If an internal clock is used,
transfer is started by a write signal to the TB/RB.
Fig. 33 Block diagram of clock synchronous serial I/O1
Fig. 34 Operation of clock synchronous serial I/O1 function
1/4
F/F
Receive buffer register
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Clock control circuit
Shift clock
Serial I/O1 synchronous
clock selection bit
Baud rate generator
Frequency division ratio 1/(n+1)
BRG count source selection bit
Clock control circuit
Falling-edge detector
Transmit buffer register
Data bus
Shift clock
Transmit shift completion flag (TSC)
Transmit buffer empty flag (TBE)
Transmit interrupt request (TI)
Transmit interrupt source selection bit
Data bus
Transmit shift register
Serial I/O1 control register
Serial I/O1 status register
Address 001816
Address 001916
Address 001C16
Address 001A16
P40/RXD
P42/SCLK1
P43/SRDY1
P41/TXD
φSOURCE
Note1:
φSOURCE indicates the followings:
XIN input in the frequency/2, 4, or 8 mode
On-chip oscillator divided by 4 in the on-chip oscillator mode
Sub-clock in the low-speed mode
(1)
D7
D0
D1
D2
D3
D4
D5
D6
D0
D1
D2
D3
D4
D5
D6
RBF = 1
TSC = 1
TBE = 0
TBE = 1
TSC = 0
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
Serial output TxD
Serial input RxD
Write pulse to receive/transmit
buffer register
Overrun error (OE)
detection
Notes 1: As the transmit interrupt (TI) source, which can be selected, either when the transmit buffer has emptied (TBE = 1) or
after the transmit shift operation has ended (TSC = 1), by setting the transmit interrupt source selection bit (TIC) of the
serial I/O1 control register.
2: If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and serial data
is output continuously from the TxD pin.
3: The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1” .
Receive enable signal SRDY
D7
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