参数资料
型号: M48T212A-85MH6
厂商: STMICROELECTRONICS
元件分类: 时钟/数据恢复及定时提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO44
封装: HATLESS, PLASTIC, SOIC-44
文件页数: 16/30页
文件大小: 155K
代理商: M48T212A-85MH6
23/30
M48T212A
VCC Switch Output
VCCSW output goes low when VOUT switches to
VCC turning on a customer supplied P-Channel
MOSFET (see Figure 4, page 6). The Motorola
MTD20P06HDL is recommended. This MOSFET
in turn connects VOUT to a separate supply when
the current requirement is greater than IOUT1 (see
Table 5, page 9). This output may also be used
simply to indicate the status of the internal battery
switchover comparator, which controls the source
(VCC or battery) of the VOUT output.
Power-on Reset
The M48T212A continuously monitors VCC. When
VCC falls to the power fail detect trip point, the RST
pulls low (open drain) and remains low on power-
up for 40 to 200ms after VCC passes VPFD (max).
The RST pin is an open drain output and an appro-
priate pull-up resistor to VCC should be chosen to
control rise time.
Note: If the RST output is fed back into either of
the RSTIN inputs (for a microprocessor with a bi-
directional reset) then a 1k
(max) pull-up resistor
is recommended.
Reset Inputs (RSTIN1 & RSTIN2)
The M48T212A provides two independent inputs
which can generate an output reset. The duration
and function of these resets is identical to a reset
generated by a power cycle. Table 15 and Figure
12 illustrate the AC reset characteristics of this
function. During the time RST is enabled (tR1HRH
&tR2HRH), the Reset Inputs are ignored.
Note: RSTIN1 and RSTIN2 are each internally
pulled up to VCC through a 100K resistor.
Figure 12. (RSTIN1 & RSTIN2) Timing Waveforms
Table 15. Reset AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA = 0 to 70°C or –40 to 85°C; VCC = 3.0 to 3.6V (except where noted).
2. Pulse width less than 50ns will result in no RESET (for noise immunity).
3. Pulse width less than 20ms will result in no RESET (for noise immunity).
4. CL = 5pF (see Figure 5, page 8).
Symbol
Parameter(1)
Min
Max
Unit
tR1
(2)
RSTIN1 Low to RSTIN1 High
200
ns
tR2
(3)
RSTIN2 Low to RSTIN2 High
100
ms
tR1HRH
(4)
RSTIN1 High to RST High
40
200
ms
tR2HRH
(4)
RSTIN2 High to RST High
40
200
ms
AI02642
RSTIN1
RST
RSTIN2
tR1
tR1HRH
tR2
tR2HRH
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