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参数资料
| 型号： | M48T35Y-70PC6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP28 |
| 封装： | 0.600 INCH, CAPHAT, PLASTIC, DIP-28 |
| 文件页数： | 3/26页 |
| 文件大小： | 349K |
| 代理商： | M48T35Y-70PC6 |
11/26
M48T35, M48T35Y
WRITE Mode
The M48T35/Y is in the WRITE Mode whenever W
and E are low. The start of a WRITE is referenced
from the latter occurring falling edge of W or E. A
WRITE is terminated by the earlier rising edge of
W or E. The addresses must be held valid through-
out the cycle. E or W must return high for a mini-
mum of tEHAX from Chip Enable or tWHAX from
WRITE Enable prior to the initiation of another
READ or WRITE Cycle. Data-in must be valid tD-
VWH prior to the end of WRITE and remain valid for
tWHDX afterward. G should be kept high during
WRITE Cycles to avoid bus contention; although,
if the output bus has been activated by a low on E
and G, a low on W will disable the outputs tWLQZ
after W falls.
Figure 9. WRITE Enable Controlled, WRITE AC Waveform
Figure 10. Chip Enable Controlled, WRITE AC Waveforms
AI00926
tAVAV
tWHAX
tDVWH
DATA INPUT
A0-A14
E
W
DQ0-DQ7
VALID
tAVWH
tAVEL
tWLWH
tAVWL
tWLQZ
tWHDX
tWHQX
AI00927
tAVAV
tEHAX
tDVEH
A0-A14
E
W
DQ0-DQ7
VALID
tAVEH
tAVEL
tAVWL
tELEH
tEHDX
DATA INPUT
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T35Y-70PC6E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 256 Kbit (32 Kb x 8) TIMEKEEPER SRAM |
| M48T35Y-70PC6F | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 256 Kbit (32 Kb x 8) TIMEKEEPER SRAM |
| M48T35Y-70PC6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T35Y-70PM1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 256 Kbit (32 Kb x 8) TIMEKEEPER SRAM |
| M48T35Y-70PM1E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 256 Kbit (32 Kb x 8) TIMEKEEPER SRAM |
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