- 您现在的位置：买卖IC网 > PDF目录67775 > M48T35Y-70PC6 (STMICROELECTRONICS) 0 TIMER(S), REAL TIME CLOCK, PDIP28 PDF资料下载
参数资料
| 型号： | M48T35Y-70PC6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP28 |
| 封装： | 0.600 INCH, CAPHAT, PLASTIC, DIP-28 |
| 文件页数： | 8/26页 |
| 文件大小： | 349K |
| 代理商： | M48T35Y-70PC6 |
M48T35, M48T35Y
16/26
Calibrating the Clock
The M48T35/Y is driven by a quartz-controlled os-
cillator with a nominal frequency of 32,768 Hz. The
devices are tested not to exceed 35 PPM (parts
per million) oscillator frequency error at 25°C,
which equates to about ±1.53 minutes per month.
With the calibration bits properly set, the accuracy
of each M48T35/Y improves to better than +1/–2
PPM at 25°C.
The oscillation rate of any crystal changes with
temperature (see Figure 12, page 17). Most clock
chips compensate for crystal frequency and tem-
perature shift error with cumbersome “trim” capac-
itors. The M48T35/Y design, however, employs
periodic counter correction. The calibration circuit
adds or subtracts counts from the oscillator divider
circuit at the divide by 256 stage, as shown in Fig-
ure 13, page 17. The number of times pulses are
blanked (subtracted, negative calibration) or split
(added, positive calibration) depends upon the
value loaded into the five calibration bits found in
the Control Register. Adding counts speeds the
clock up, subtracting counts slows the clock down.
The Calibration Byte occupies the five lower order
bits (D4-D0) in the Control Register 7FF8h. These
bits can be set to represent any value between 0
and 31 in binary form. Bit D5 is the Sign Bit; '1' in-
dicates positive calibration, '0' indicates negative
calibration. Calibration occurs within a 64 minute
cycle. The first 62 minutes in the cycle may, once
per minute, have one second either shortened by
128 or lengthened by 256 oscillator cycles. If a bi-
nary '1' is loaded into the register, only the first 2
minutes in the 64 minute cycle will be modified; if
a binary 6 is loaded, the first 12 will be affected,
and so on.
Therefore, each calibration step has the effect of
adding 512 or subtracting 256 oscillator cycles for
every 125,829,120 actual oscillator cycles, that is
+4.068 or –2.034 PPM of adjustment per calibra-
tion step in the calibration register. Assuming that
the oscillator is in fact running at exactly 32,768
Hz, each of the 31 increments in the Calibration
Byte would represent +10.7 or –5.35 seconds per
month which corresponds to a total range of +5.5
or –2.75 minutes per month.
Two methods are available for ascertaining how
much calibration a given M48T35/Y may require.
The first involves simply setting the clock, letting it
run for a month and comparing it to a known accu-
rate reference (like WWV broadcasts). While that
may seem crude, it allows the designer to give the
end user the ability to calibrate his clock as his en-
vironment may require, even after the final product
is packaged in a non-user serviceable enclosure.
All the designer has to do is provide a simple utility
that accesses the Calibration Byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of
some test equipment. When the Frequency Test
(FT) Bit, the seventh-most significant bit in the Day
Register is set to a '1,' and D7 of the Seconds Reg-
ister is a '0' (Oscillator Running), DQ0 will toggle at
512 Hz during a READ of the Seconds Register.
Any deviation from 512 Hz indicates the degree
and direction of oscillator frequency shift at the test
temperature. For example, a reading of 512.01024
Hz would indicate a +20 PPM oscillator frequency
error, requiring a –10 (WR001010) to be loaded
into the Calibration Byte for correction.
Note: Setting or changing the Calibration Byte
does not affect the Frequency Test output fre-
quency.
The FT Bit MUST be reset to '0' for normal clock
operations to resume. The FT Bit is automatically
Reset on power-down.
For more information on calibration, see Applica-
tion Note AN934, “TIMEKEEPER Calibration.”
Century Bit
Bit D5 and D4 of Clock Register 1FFCh contain
the CENTURY ENABLE Bit (CEB) and the CEN-
TURY Bit (CB). Setting CEB to a '1' will cause CB
to toggle, either from a '0' to '1' or from '1' to '0' at
the turn of the century (depending upon its initial
state). If CEB is set to a '0,' CB will not toggle.
Note: The WRITE Bit must be set in order to write
to the CENTURY Bit.
相关PDF资料 |
PDF描述 |
|---|---|
| M5M80C85AP-2 | 8-BIT, 5 MHz, MICROPROCESSOR, PDIP40 |
| M5M82C55AFP-2 | 24 I/O, PIA-GENERAL PURPOSE, PDSO40 |
| M5M82C55AP-2 | 24 I/O, PIA-GENERAL PURPOSE, PDIP40 |
| M5M82C55AJ-2 | 24 I/O, PIA-GENERAL PURPOSE, PQCC44 |
| M66230FP | 1 CHANNEL(S), 500K bps, SERIAL COMM CONTROLLER, PDSO24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T35Y-70PC6E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 256 Kbit (32 Kb x 8) TIMEKEEPER SRAM |
| M48T35Y-70PC6F | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 256 Kbit (32 Kb x 8) TIMEKEEPER SRAM |
| M48T35Y-70PC6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T35Y-70PM1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 256 Kbit (32 Kb x 8) TIMEKEEPER SRAM |
| M48T35Y-70PM1E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 256 Kbit (32 Kb x 8) TIMEKEEPER SRAM |
发布紧急采购，3分钟左右您将得到回复。