参数资料
型号: M48T512Y-70PM1
厂商: 意法半导体
英文描述: Shielded Multiconductor Cable; Number of Conductors:5; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Conductor Material:Copper; Temperature Max:80 C RoHS Compliant: Yes
中文描述: 3.3 - 5V的4兆位的SRAM 512KB的x8计时器
文件页数: 2/14页
文件大小: 104K
代理商: M48T512Y-70PM1
M48T512Y, M48T512V
2/14
Figure 2. DIP Connections
A1
A0
DQ0
DQ1
DQ2
VSS
A7
A6
A5
A4
A3
A2
A13
A8
A9
A11
G
A10
E
DQ7
DQ6
A15
A17
DQ5
DQ4
DQ3
A16
A14
A18
VCC
AI02263
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A12
W
32
31
M48T512Y
M48T512V
Table 2. Absolute Maximum Ratings
(1)
Symbol
T
A
Ambient Operating Temperature
T
STG
Storage Temperature (V
CC
Off, Oscillator Off)
Note: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational section
of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect
reliability.
2.
Soldering temperature not to exceed 260°C for 10 seconds (total thermal budget not to exceed 150°C for longer than 30 seconds).
CAUTION:
Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.
Parameter
Value
Unit
0 to 70
°C
–40 to 85
°C
T
SLD (2)
V
IO
Lead Solder Temperature for 10 seconds
260
°C
Input or Output Voltages
–0.3 to V
CC
+0.3
–0.3 to 7.0
–0.3 to 4.6
V
V
CC
Supply Voltage
M48T512Y
M48T512V
V
V
I
O
P
D
Output Current
20
mA
Power Dissipation
1
W
The M48T512Y/V directly replaces industry stan-
dard 512Kb x 8 SRAMs. It also provides the non-
volatility of Flash without any requirement for spe-
cial write timing or limitations on the number of
writes that can be performed.
The 32 pin 600 mil DIP Hybrid houses a controller
chip, SRAM, quartz crystal, and a long life lithium
button cell in a single package. Figure 3 illustrates
the static memory array and the quartz controlled
clock oscillator. The clock locations contain the
year, month, date, day, hour, minute, and second
in 24 hour BCD format. Corrections for 28, 29
(leap year - compliant until the year 2100), 30, and
31 day months are made automatically. Byte
7FFF8h is the clock control register. This byte con-
trols user access to the clock information and also
stores the clock calibration setting. The seven
clock bytes (7FFFFh-7FFF9h) are not the actual
clock counters, they are memory locations consist-
ing of BiPORT read/write memory cells within
the static RAM array. The M48T512Y/V includes a
clock control circuit which updates the clock bytes
with current information once per second. The in-
formation can be accessed by the user in the
same manner as any other location in the static
memory array. The M48T512Y/V also has its own
Power-Fail Detect circuit. This control circuitry
constantly monitors the supply voltage for an out
of tolerance condition. When V
CC
is out of toler-
ance, the circuit write protects the TIMEKEEPER
register data and external SRAM, providing data
security in the midst of unpredictable system oper-
ation. As V
CC
falls, the control circuitry automati-
cally switches to the battery, maintaining data and
clock operation until valid power is restored.
READ MODE
The M48T512Y/V is in the Read Mode whenever
W (Write Enable) is high and E (Chip Enable) is
low. The unique address specified by the 19 Ad-
dress Inputs defines which one of the 524,288
bytes of data is to be accessed. Valid data will be
available at the Data I/O pins within Address Ac-
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