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参数资料
| 型号： | M48T512Y-70PM1 |
| 厂商： | 意法半导体 |
| 英文描述： | Shielded Multiconductor Cable; Number of Conductors:5; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Conductor Material:Copper; Temperature Max:80 C RoHS Compliant: Yes |
| 中文描述： | 3.3 - 5V的4兆位的SRAM 512KB的x8计时器 |
| 文件页数： | 4/14页 |
| 文件大小： | 104K |
| 代理商： | M48T512Y-70PM1 |
M48T512Y, M48T512V
4/14
DATA RETENTION MODE
With valid V
CC
applied, the M48T512Y/V operates
as a conventional BYTEWIDE static RAM.
Should the supply voltage decay, the RAM will au-
tomatically deselect, write protecting itself when
V
CC
falls between V
PFD
(max), V
PFD
(min) win-
dow. All outputs become high impedance and all
inputs are treated as "don't care".
Note:
A power failure during a write cycle may cor-
rupt data at the current addressed location, but
does not jeopardize the rest of the RAM's content.
At voltages below V
PFD
(min), the memory will be
in a write protected state, provided the V
CC
fall
time is not less than t
F
. The M48T512Y/V may re-
spond to transient noise spikes on V
CC
that cross
into the deselect window during the time the de-
vice is sampling V
CC
.Therefore, decoupling of the
power supply lines is recommended. When V
CC
drops below V
SO
, the control circuit switches pow-
er to the internal battery, preserving data and pow-
ering the clock. The internal energy source will
maintain data in the M48T512Y/V for an accumu-
lated period of at least 10 years at room tempera-
ture. As system power rises above V
SO
, the
battery is disconnected, and the power supply is
Figure 4. Block Diagram
AI02384
LITHIUM
CELL
OSCILLATOR AND
CLOCK CHAIN
VPFD
VCC
VSS
32,768 Hz
CRYSTAL
VOLTAGE SENSE
AND
SWITCHING
CIRCUITRY
8 x 8
TIMEKEEPER
REGISTERS
524,280 x 8
SRAM ARRAY
A0-A18
DQ0-DQ7
E
W
G
POWER
switched to external V
CC
. Write protection contin-
ues until V
CC
reaches V
PFD
(min) plus t
ER
(min).
Normal RAM operation can resume t
ER
after V
CC
exceeds V
PFD
(max). Refer to Application Note
(AN1012) on the ST Web Site for more information
on battery life.
CLOCK OPERATIONS
Reading the Clock Updates to the TIMEKEEPER
registers should be halted before clock data is
read to prevent reading data in transition. Because
the BiPORT TIMEKEEPER cells in the RAM array
are only data registers, and not the actual clock
counters, updating the registers can be halted
without disturbing the clock itself. Updating is halt-
ed when a '1' is written to the READ bit, D6 in the
Control Register (7FFF8h). As long as a '1' re-
mains in that position, updating is halted. After a
halt is issued, the registers reflect the count; that
is, the day, date, and time that were current at the
moment the halt command was issued. All of the
TIMEKEEPER registers are updated simulta-
neously. A halt will not interrupt an update in
progress. Updating occurs 1 second after the
READ bit is reset to a '0'.
相关PDF资料 |
PDF描述 |
|---|---|
| M48T512Y-85PM1 | 3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T512YPM | 3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513VPM | 3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513V-70CS1 | 3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513V-70PM1 | 3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T512Y-70PM1 | 制造商:STMicroelectronics 功能描述:NVRAM 10 YR BATTERY 4MB 48T512 |
| M48T512Y-85PM1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5.0 or 3.3 V, 4 Mbit (512 Kbit x 8) TIMEKEEPER? SRAM |
| M48T512YPM | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513V | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
| M48T513V-70CS1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM |
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