参数资料
型号: M48T513Y-70PM1
厂商: STMICROELECTRONICS
元件分类: 时钟/数据恢复及定时提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDIP36
封装: 0.600 INCH, PLASTIC, MODULE, DIP-36
文件页数: 6/18页
文件大小: 134K
代理商: M48T513Y-70PM1
M48T513Y, M48T513V
14/18
Table 12. Alarm Repeat Mode
RPT4
RPT3
RPT2
RPT1
Alarm Activated
1
Once per Second
1
0
Once per Minute
1
0
Once per Hour
1
0
Once per Day
1
0
Once per Month
Figure 13. Supply Voltage Protection
AI02169
VCC
0.1
F
DEVICE
VCC
VSS
This allows the designer to give the end user the
ability to calibrate the clock as the environment re-
quires, even if the final product is packaged in a
non-user serviceable enclosure. The designer
could provide a simple utility that accesses the
Calibration byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of the
IRQ/FT pin. The pin will toggle at 512Hz, when the
Stop bit (ST, D7 of 7FFF9h) is ’0’, the Frequency
Test bit (FT, D6 of 7FFFCh) is ’1’, the Alarm Flag
Enable bit (AFE, D7 of 7FFF6h) is ’0’, and the
Watchdog Steering bit (WDS, D7 of 7FFF7h) is ’1’
or the Watchdog Register (7FFF7h = 0) is reset.
Note: A 4 second settling time must be allowed
before reading the 512Hz output.
Any deviation from 512Hz indicates the degree
and direction of oscillator frequency shift at the test
temperature.
For
example,
a
reading
of
512.010124Hz would indicate a +20 ppm oscillator
frequency error, requiring a –10 (WR001010) to be
loaded into the Calibration Byte for correction.
Note that setting or changing the Calibration Byte
does not affect the Frequency test output frequen-
cy.
The IRQ/FT pin is an open drain output which re-
quires a pull-up resistor for proper operation. A
500-10k
resistor is recommended in order to
control the rise time. The FT bit is cleared on pow-
er-up.
BATTERY LOW WARNING
The M48T513Y/V automatically performs battery
voltage monitoring upon power-up and at factory-
programmed time intervals of approximately 24
hours. The Battery Low (BL) bit, Bit D4 of Flags
Register 7FFF0h, will be asserted if the battery
voltage is found to be less than approximately
2.5V.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below ap-
proximately 2.5 volts and may not be able to
maintain data integrity in the SRAM. Data should
be considered suspect and verified as correct.
If a battery low indication is generated during the
24-hour interval check, this indicates that the bat-
tery is near end of life. However, data is not com-
promised due to the fact that a nominal VCC is
supplied.
The M48T513Y/V only monitors the battery when
a nominal VCC is applied to the device. Thus appli-
cations which require extensive durations in the
battery back-up mode should be powered-up peri-
odically (at least once every few months) in order
for this technique to be beneficial. Additionally, if a
battery low is indicated, data integrity should be
verified upon power-up via a checksum or other
technique.
POWER-ON DEFAULTS
Upon application of power to the device, the fol-
lowing register bits are set to a '0' state: WDS,
BMB0-BMB4, RB0,RB1, AFE, ABE, W, R and FT.
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