- 您现在的位置：买卖IC网 > PDF目录383302 > M50FW040K5TG (意法半导体) 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory PDF资料下载
参数资料
| 型号： | M50FW040K5TG |
| 厂商： | 意法半导体 |
| 英文描述： | 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory |
| 中文描述： | 4兆位（512 KB的× 8，均匀块）3 - V电源供电的闪存固件枢纽 |
| 文件页数： | 17/53页 |
| 文件大小： | 278K |
| 代理商： | M50FW040K5TG |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页
M50FW040
Bus operations
17/53
3
Bus operations
The two interfaces have similar bus operations but the signals and timings are completely
different. The Firmware Hub (FWH) Interface is the usual interface and all of the functionality
of the part is available through this interface. Only a subset of functions are available
through the Address/Address Multiplexed (A/A Mux) Interface.
Follow the section
Firmware hub (FWH) bus operations
below and the section
Address/Address multiplexed (A/A Mux) bus operations
below for a description of the bus
operations on each interface.
3.1
Firmware hub (FWH) bus operations
The Firmware Hub (FWH) Interface consists of four data signals (FWH0-FWH3), one control
line (FWH4) and a clock (CLK). In addition protection against accidental or malicious data
corruption can be achieved using two further signals (TBL and WP). Finally two reset
signals (RP and INIT) are available to put the memory into a known state.
The data signals, control signal and clock are designed to be compatible with PCI electrical
specifications. The interface operates with clock speeds up to 33MHz.
The following operations can be performed using the appropriate bus cycles: Bus Read, Bus
Write, Standby, Reset and Block Protection.
3.1.1
Bus Read
Bus Read operations read from the memory cells, specific registers in the Command
Interface or Firmware Hub Registers. A valid Bus Read operation starts when Input
Communication Frame, FWH4, is Low, V
IL
, as Clock rises and the correct Start cycle is on
FWH0-FWH3. On the following clock cycles the Host will send the Memory ID Select,
Address and other control bits on FWH0-FWH3. The memory responds by outputting Sync
data until the wait-states have elapsed followed by Data0-Data3 and Data4-Data7.
Refer to
Table 4: FWH bus Read field definitions
, and
Figure 6: FWH Bus Read waveforms
,
for a description of the Field definitions for each clock cycle of the transfer. See
Table 20:
FWH interface AC signal timing characteristics
, and
Figure 11: FWH interface AC signal
timing waveforms
, for details on the timings of the signals.
3.1.2
Bus Write
Bus Write operations write to the Command Interface or Firmware Hub Registers. A valid
Bus Write operation starts when Input Communication Frame, FWH4, is Low, V
IL
, as Clock
rises and the correct Start cycle is on FWH0-FWH3. On the following Clock cycles the Host
will send the Memory ID Select, Address, other control bits, Data0-Data3 and Data4-Data7
on FWH0-FWH3. The memory outputs Sync data until the wait-states have elapsed.
Refer to
Table 5: FWH bus Write field definitions
, and
Figure 7: FWH Bus Write waveforms
,
for a description of the Field definitions for each clock cycle of the transfer. See
Table 20:
FWH interface AC signal timing characteristics
, and
Figure 11: FWH interface AC signal
timing waveforms
, for details on the timings of the signals.
相关PDF资料 |
PDF描述 |
|---|---|
| M50FW040K5TP | 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory |
| M50FW040N5G | 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory |
| M50FW040N5P | 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory |
| M50FW040N5TG | 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory |
| M50FW040N5TP | 4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M50FW040K5TP | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4-Mbit (512 Kb x8, uniform block) 3-V supply firmware hub Flash memory |
| M50FW040N | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block 3V Supply Firmware Hub Flash Memory |
| M50FW040N1 | 功能描述:闪存 3.6V 4M (512Kx8) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| M50FW040N1T | 功能描述:闪存 3.6V 4M (512Kx8) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| M50FW040N5 | 功能描述:闪存 3.0-3.6V 4M (512Kx8) RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。