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参数资料
| 型号： | M58LW128A150N1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | PROM |
| 英文描述： | 8M X 16 FLASH 3V PROM, 150 ns, PDSO56 |
| 封装： | 14 X 20 MM, PLASTIC, TSOP-56 |
| 文件页数： | 3/65页 |
| 文件大小： | 378K |
| 代理商： | M58LW128A150N1 |
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M58LW128A, M58LW128B
Figure 6. Block Addresses
Note: Also see Appendix A, Table 28 for a full listing of the Block Addresses
SIGNAL DESCRIPTIONS
See Figure 2, Logic Diagram and Table 1, Signal
Names, for a brief overview of the signals connect-
ed to this device.
Address Inputs (A1-A23). The Address Inputs
are used to select the cells to access in the mem-
ory array during Bus Read operations either to
read or to program data to. During Bus Write oper-
ations they control the commands sent to the
Command Interface of the internal state machine.
Chip Enable must be low when selecting the ad-
dresses.
The address inputs are latched on the rising edge
of Chip Enable, Write Enable or Latch Enable,
whichever occurs first in a write operation. The ad-
dress latch is transparent when Latch Enable is
low, VIL. The address is internally latched in a pro-
gram or erase operation.
With a x32 Bus Width, WORD = VIH, Address Input
A1 is ignored; the Least Significant Word is output
on DQ0-DQ15 and the Most Significant Word is
output on DQ16-DQ31. With a x16 Bus Width,
WORD = VIL, the Least Significant Word is output
on DQ0-DQ15 when A1 is low, VIL, and the Most
Significant Word is output on DQ0-DQ15 when A1
is high, VIH.
Data Inputs/Outputs (DQ0-DQ31). The Data In-
puts/Outputs output the data stored at the selected
address during a Bus Read operation, or are used
to input the data during a Program operation. Dur-
ing Bus Write operations they represent the com-
mands sent to the Command Interface of the
internal state machine. When used to input data or
write commands they are latched on the rising
edge of Write Enable or Chip Enable, whichever
occurs first.
When Chip Enable and Output Enable are both
low, VIL, the data bus outputs data from the mem-
ory array, the Electronic Signature, the Block Pro-
tection status, the CFI Information or the contents
of the Status Register. The data bus is high imped-
ance when the chip is deselected, Output Enable
is High, VIH, or the Reset/Power-Down signal is
Low, VIL. When the Program/Erase Controller is
active the Ready/Busy status is given on DQ7
while DQ0-DQ6 and DQ8-DQ31 are high imped-
ance.
With a x16 Bus Width, WORD = VIL, DQ16-DQ31
are not used and are high impedance.
Chip Enable (E). The Chip Enable, E, input acti-
vates the memory control logic, input buffers, de-
coders and sense amplifiers. Chip Enable, E, at
VIH deselects the memory and reduces the power
consumption to the Standby level, IDD1.
Output Enable (G). The Output Enable, G, gates
the outputs through the data output buffers during
a read operation. When Output Enable, G, is at VIH
AI06130
1Mbit or
64 KWords
7FFFFFh
7F0000h
1Mbit or
64 KWords
01FFFFh
010000h
1Mbit or
64 KWords
00FFFFh
000000h
1Mbit or
32 KDouble-Words
3FFFFFh
3F8000h
1Mbit or
32 KDouble-Words
00FFFFh
008000h
1Mbit or
32 KDouble-Words
007FFFh
000000h
M58LW128A, M58LW128B
Word (x16) Bus Width
Address lines A1-A23
M58LW128B
Double-Word (x32) Bus Width
Address lines A2-A23
(A1 is Don’t Care)
1Mbit or
64 KWords
7EFFFFh
7E0000h
Total of 128
1 Mbit Blocks
1Mbit or
32 KDouble-Words
3F7FFFh
3F0000h
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M58LW128A150N1E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories |
| M58LW128A150N1F | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories |
| M58LW128A150N1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories |
| M58LW128A150N6E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories |
| M58LW128A150N6F | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:128 Mbit 8Mb x16 or 4Mb x32, Uniform Block, Burst 3V Supply Flash Memories |
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