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参数资料
| 型号： | M5M5Y5672TG-25 |
| 厂商： | Mitsubishi Electric Corporation |
| 英文描述： | 18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM |
| 中文描述： | 18874368位（262144 - Word的72位）网络的SRAM |
| 文件页数： | 16/27页 |
| 文件大小： | 240K |
| 代理商： | M5M5Y5672TG-25 |
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MITSUBISHI LSIs
M5M5Y5672TG – 25,22,20
18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM
16
MITSUBISHI
ELECTRIC
Advanced Information
M5M5Y5672TG REV.0.1
(1) MEASUREMENT CONDITION
Input pulse levels ········································ V
IH
=V
DDQ
, V
IL
=0V
Input rise and fall times ······························· faster than or equal to 1V/ns
Input timing reference levels ······················· V
IH
=V
IL
=V
DDQ
/ 2
Output reference levels ······························· V
IH
=V
IL
=V
DDQ
/ 2
Output load ·················································· Fig.1
Note29.Valid Delay Measurement is made from the V
DDQ
/2 on the input waveform to the V
DDQ
/2 on the output waveform.
Input waveform should have a slew rate of faster than or equal to 1V/ns.
Note30.Tri-state toff measurement is made from the V
DDQ
/2 on the input waveform to the output waveform moving 20%
from its initial to final Value V
DDQ
/2.
Note:the initial value is not V
OL
or V
OH
as specified in DC ELECTRICAL CHARACTERISTICS table.
Note31. Tri-state ton measurement is made from the V
DDQ
/2 on the input waveform to the output waveform moving 20%
from its initial Value V
DDQ
/2 to its final Value.
Note:the final value is not V
OL
or V
OH
as specified in DC ELECTRICAL CHARACTERISTICS table.
Note32.Clocks,Data,Address and control signals will be tested with a minimum input slew rate of faster than or equal to 1V/ns.
Z
O
=50
50
Q
V
T
=V
DDQ
/ 2
30pF
(Including wiring and JIG)
Fig.1 Output load
V
DDQ
/ 2
V
DDQ
/ 2
t
plh
t
phl
Input
Waveform
Output
Waveform
V
DDQ
/ 2
Input
Waveform
Vh-(0.2(Vh-Vz)) Vz+(0.2(Vh-Vz))
Vz
0.2(Vz-Vl)
Vz-(0.2(Vz-Vl))
toff
ton
(toff)
(ton)
Vh
Vl
Output
Waveform
Fig.2 Tdly measurement
Fig.3 Tri-State measurement
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