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参数资料
| 型号： | M5M5Y5672TG-25 |
| 厂商： | Mitsubishi Electric Corporation |
| 英文描述： | 18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM |
| 中文描述： | 18874368位（262144 - Word的72位）网络的SRAM |
| 文件页数： | 17/27页 |
| 文件大小： | 240K |
| 代理商： | M5M5Y5672TG-25 |
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MITSUBISHI LSIs
M5M5Y5672TG – 25,22,20
18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM
17
MITSUBISHI
ELECTRIC
Advanced Information
M5M5Y5672TG REV.0.1
(2)TIMING CHARACTERISTICS
Limits
225MHz
-22
Min
250MHz
-25
Min
200MHz
-20
Min
Symbol
Parameter
Max
Max
Max
Unit
Clock
t
KHKH
t
KHKL
t
KLKH
Output times
t
KHQV
t
KHQX
t
KHQX1
t
KHQZ
t
CHCL
t
CLCH
t
KHCH
t
KLCL
t
KHCX1
t
KHCZ
t
CHQV
t
CHQX
Setup Times
t
AVKH
t
advVKH
ADV Valid to Clock HIGH
t
WVKH
Write Valid to Clock HIGH
t
BxVKH
Byte Write Valid to Clock HIGH (BWa#~BWh#)
t
EVKH
Enable Valid to Clock HIGH (E1#,E2,E3)
t
DVKH
Data In Valid Clock HIGH
Hold Times
t
KHAX
Clock HIGH to Address don’t care
t
KHadvX
Clock HIGH to ADV don’t care
t
KHWX
Clock HIGH to Write don’t care
t
KHBxX
Clock HIGH to Byte Write don’t care (BWa#~BWh#)
t
KHEX
Clock HIGH to Enable don’t care (E1#,E2,E3)
t
KHDX
Clock HIGH to Data In don’t care
Note33. Test conditions is specified with the output loading shown in Fig.1 unless otherwise noted.
Note34. t
KHQX1
, t
KHQZ
, t
KHCX1
, t
KHCZ
are sampled.
Note35. LBO#, EP2, EP3, ZQ is static and must not change during normal operation.
Clock Cycle Time
Clock HIGH Time
Clock LOW Time
4.0
1.5
1.5
4.4
1.6
1.6
5.0
1.8
1.8
ns
ns
ns
Clock HIGH to Output Valid
Clock HIGH to Output Invalid
Clock HIGH to Output in Low-Z
Clock HIGH to Output in High-Z
Echo Clock HIGH Time
Echo Clock LOW Time
Clock HIGH to Echo Clock HIGH
Clock LOW to Echo Clock LOW
Clock HIGH to Echo Clock Low-Z
Clock HIGH to Echo Clock High-Z
Echo Clock HIGH to Output Valid
Output Invalid to Echo Clock HIGH
2.6
2.6
2.5
2.5
2.5
0.5
-0.5
2.8
2.8
2.7
2.7
2.7
0.5
-0.5
3.2
3.2
3.1
3.1
3.1
0.5
-0.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.5
0.5
0.5
1.25
1.25
0.5
0.5
0.5
0.5
0.6
0.6
0.6
1.35
1.35
0.5
0.5
0.5
0.5
0.7
0.7
0.7
1.55
1.55
0.5
0.5
0.5
0.5
Address Valid to Clock HIGH
0.8
0.8
0.8
0.8
0.8
0.8
1.0
1.0
1.0
1.0
1.0
1.0
1.2
1.2
1.2
1.2
1.2
1.2
ns
ns
ns
ns
ns
ns
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
ns
ns
ns
ns
ns
ns
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