参数资料
型号: M68HC16Y1CFC
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 16-BIT, MROM, MICROCONTROLLER, PQFP16
封装: QFP-160
文件页数: 134/138页
文件大小: 784K
代理商: M68HC16Y1CFC
MC68HC16Y1
MOTOROLA
MC68HC16Y1TS/D
95
Port ADA is an input port that shares pins with the A/D converter inputs.
Port ADA Data[7:0]
A read of PORTADA[7:0] will return the logic level of the port A pins. If the input is not an appropriate
voltage (i.e., outside the defined levels), the read will be indeterminate. Use of a port A pin for digital
input does not preclude use as an analog input.
ADCTL0 is used to select ADC clock source and to set up prescaling. Writes to it have immediate effect.
RES10 — 10-Bit Resolution
0 = 8-bit conversion
1 = 10-bit conversion
Conversion results are appropriately aligned in result registers to reflect conversion status.
STS[1:0] — Sample Time Select Field
The STS field is used to select one of four sample times, as shown in the following table.
PRS[4:0] — Prescaler Rate Selection Field
ADC clock is generated from system clock using a modulo counter and a divide-by-two circuit. The bi-
nary value of this field is the counter modulus. System clock is divided by the PRS value plus one, then
sent to the divide-by-two circuit, as shown in the following table. Maximum ADC clock rate is 2 MHz.
Reset value of PRS in the MC68HC16Y1 is a divisor value of eight — this translates to a nominal 2 MHz
ADC clock.
PORTADA — Port Data Register
$YFF706
15
8
7
0
NOT USED
PORT A DATA
RESET:
0
INPUT DATA
ADCTL0 — A/D Control Register 0
$YFF70A
15
8
7
6
5
4
3
2
1
0
NOT USED
RES10
STS
PRS
RESET:
0
1
STS[1:0]
Sample Time
00
2 A/D Clock Periods
01
4 A/D Clock Periods
10
8 A/D Clock Periods
11
16 A/D Clock Periods
PRS[4:0]
Divisor Value
00000
Reserved
00001
4
00010
6
...
11101
60
11110
62
11111
64
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