参数资料
型号: M68Z128
厂商: 意法半导体
英文描述: 5V, 1Mbit(128Kbx8) Low Power SRAM with Output Enable(1Mb低功耗SRAM)
中文描述: 5V的,一个容量为1Mbit(128Kbx8)低功率SRAM的输出使能(1兆低功耗的SRAM)
文件页数: 1/12页
文件大小: 69K
代理商: M68Z128
M68Z128
5V, 1 Mbit (128Kb x8) Low Power SRAM with Output Enable
PRELIMINARY DATA
AI00647
17
A0-A16
W
DQ0-DQ7
VCC
M68Z128
G
E2
VSS
8
E1
Figure 1. LogicDiagram
A0-A16
AddressInputs
DQ0-DQ7
Data Inputs / Outputs
E1
ChipEnable 1
E2
ChipEnable 2
G
Output Enable
W
Write Enable
V
CC
SupplyVoltage
V
SS
Ground
Table1. SignalNames
TSOP32 (N)
(8 x 20mm)
November 1998
1/12
This is preliminaryinformation on a new product now indevelopmentor undergoing evaluation. Detail s are subjectto change without notice.
ULTRALOW DATARETENTION CURRENT
– 10nA(typical)
– 1.0
μ
A(max)
OPERATIONVOLTAGE:5V
±
10%
128Kb x 8 VERYFAST SRAMwith OUTPUT
ENABLE
EQUALCYCLEand ACCESSTIMES: 55ns
LOW V
CC
DATARETENTION: 2V
TRI-STATE COMMON I/O
LOW ACTIVEand STANDBYPOWER
AUTOMATICPOWER-DOWN WHEN
DESELECTED
DESCRIPTION
The M68Z128 is a 1 Mbit (1,048,576 bit) CMOS
SRAM,organizedas 131,072 wordsby 8 bits.The
device features fully static operation requiring no
external clocks or timing strobes, with equal ad-
dress access and cycle times. It requires a single
5V
±
10% supply, and all inputs and outputs are
TTLcompatible.
Thisdevicehas an automaticpower-downfeature,
reducing the power consumption by over 99%
when deselected.
The M68Z128 is available in TSOP32(8 x 20mm)
package.
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