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参数资料
| 型号： | M68Z128 |
| 厂商： | 意法半导体 |
| 英文描述： | 5V, 1Mbit(128Kbx8) Low Power SRAM with Output Enable(1Mb低功耗SRAM) |
| 中文描述： | 5V的，一个容量为1Mbit（128Kbx8）低功率SRAM的输出使能（1兆低功耗的SRAM） |
| 文件页数： | 5/12页 |
| 文件大小： | 69K |
| 代理商： | M68Z128 |
Symbol
Parameter
M68Z128
Unit
-55
Min
Max
t
AVAV
Read Cycle Time
55
ns
t
AVQV(1)
Address Validto Output Valid
55
ns
t
E1LQV(1)
Chip Enable 1 Low to Output Valid
55
ns
t
E2HQV(1)
Chip Enable 2 High to Output Valid
55
ns
t
GLQV(1)
Output Enable Low to Output Valid
20
ns
t
E1LQX(3)
Chip Enable 1 Low to Output Transition
5
ns
t
E2HQX
t
GLQX(3)
(3)
Chip Enable 2 High to Output Transition
5
ns
Output Enable Low to Output Transition
0
ns
t
E1HQZ(2,3)
Chip Enable 1 High to Output Hi-Z
20
ns
t
E2LQZ
(2,3)
Chip Enable 2 Low to Output Hi-Z
20
ns
t
GHQZ(2,3)
Output Enable High to Output Hi-Z
20
ns
t
AXQX(1)
Address Transition to Output Transition
5
ns
t
PU
Chip Enable 1 Low or Chip Enable 2 High to Power Up
0
ns
t
PD
Chip Enable 1 High or Chip Enable 2 Low to Power Down
55
ns
Notes:
1. C
L
= 100pF(see Figure 4)
2. C
= 5pF (see Figure 4)
3. At any given temperature and voltage condition,t
EIHQZ
+ t
EZHQZ
isless than t
EILQX
and t
EZLQX
, t
GHQZ
is less thant
GLQX
for any
given device.
Table7. Read and Standby Modes AC Characteristics
(T
A
= 0 to 70
°
C; V
CC
= 5V
±
10%)
AI01078
tAVAV
tAVQV
tAXQX
A0-A16
DQ0-DQ7
VALID
DATA VALID
Figure 5. AddressControlled, ReadMode AC Waveforms
Note:
E1 = Low, E2 = High, G = Low, W = High
5/12
M68Z128
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相关代理商/技术参数 |
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|---|---|
| M68Z128-55N1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
| M68Z128N | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
| M68Z128W | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
| M68Z128W-70N1 | 功能描述:RAM其它 4M (128Kx8) 70ns RoHS:否 制造商:Freescale Semiconductor 封装:Tray |
| M68Z128W-70N1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
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