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参数资料
| 型号： | M68Z128 |
| 厂商： | 意法半导体 |
| 英文描述： | 5V, 1Mbit(128Kbx8) Low Power SRAM with Output Enable(1Mb低功耗SRAM) |
| 中文描述： | 5V的，一个容量为1Mbit（128Kbx8）低功率SRAM的输出使能（1兆低功耗的SRAM） |
| 文件页数： | 3/12页 |
| 文件大小： | 69K |
| 代理商： | M68Z128 |
If the Output is enabled (E1 = Low, E2 = High and
G = Low), then W will return the outputs to high
impedance within t
WLQZ
of its falling edge. Care
must be taken to avoid bus contentionin this type
of operation. Data input must be valid for t
DVWH
beforetherisingedgeof WriteEnable,or fort
DVE1H
beforetherisingedge of E1 orfort
DVE2L
beforethe
falling edge of E2, whichever occurs first, and
remain valid for t
WHDX,
t
E1HDX
or t
E2LDX
.
OPERATIONAL MODE
The M68Z128 has a Chip Enable power down
featurewhichinvokes an automaticstandbymode
whenevereither Chip Enable is de-asserted(E1 =
High or E2 = Low). An Output Enable (G) signal
AI00658B
5.0V
OUT
CL= 50pF or 5pF
CLincludes JIG capacitance
1800
DEVICE
UNDER
TEST
990
Figure 4. AC Testing Load Circuit
Input Rise and Fall Times
≤
5ns
Input Pulse Voltages
0 to 3V
Input and Output TimingRef. Voltages
1.5V
Note that Output Hi-Z is defined as the point where data is no
longer driven.
Table4. ACMeasurementConditions
Mode
E1
E2
W
G
DQ0-DQ7
Power
Read
V
IL
V
IH
V
IH
V
IH
Hi-Z
Active
Read
V
IL
V
IH
V
IH
V
IL
Data Output
Active
Write
V
IL
V
IH
V
IL
X
Data Input
Active
Deselect
V
IH
X
X
X
Hi-Z
Standby
Deselect
X
V
IL
X
X
Hi-Z
Standby
Note
: X =V
IH
or V
IL
Table3. OperatingModes
providesa highspeedtri-statecontrol,allowingfast
read/writecycles to be achievedwith the common
I/O data bus. Operational modes are determined
bydevicecontrolinputsW, E1, andE2 as summa-
rized in the OperatingModes table.
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance on all pins (except DQ)
V
IN
= 0V
9
pF
C
OUT(2)
Output Capacitance
V
OUT
= 0V
9
pF
Notes:
1. Sampled only,not 100% tested
2. Outputsdeselected
Table 5. Capacitance
(1)
(T
A
= 25
°
C, f = 1 MHz )
3/12
M68Z128
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相关代理商/技术参数 |
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|---|---|
| M68Z128-55N1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
| M68Z128N | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
| M68Z128W | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
| M68Z128W-70N1 | 功能描述:RAM其它 4M (128Kx8) 70ns RoHS:否 制造商:Freescale Semiconductor 封装:Tray |
| M68Z128W-70N1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable |
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