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参数资料
| 型号： | M69AW048B |
| 厂商： | 意法半导体 |
| 英文描述： | 32 Mbit (2M x16) 3V Asynchronous PSRAM |
| 中文描述： | 32兆位（200万× 16）3V的异步移动存储芯片 |
| 文件页数： | 6/29页 |
| 文件大小： | 433K |
| 代理商： | M69AW048B |
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M69AW048B
6/29
SIGNAL DESCRIPTIONS
See
Figure 2., Logic Diagram
, and
Table
1., Signal Names
, for a brief overview of the sig-
nals connected to this device.
Address Inputs (A0-A20).
The Address Inputs
select the cells in the memory array to access dur-
ing Read and Write operations.
Data Inputs/Outputs (DQ8-DQ15).
The
Byte Data Inputs/Outputs carry the data to or from
the upper part of the selected address during a
Write or Read operation, when Upper Byte Enable
(UB) is driven Low.
Data Inputs/Outputs (DQ0-DQ7).
The
Byte Data Inputs/Outputs carry the data to or from
the lower part of the selected address during a
Write or Read operation, when Lower Byte Enable
(LB) is driven Low.
Chip Enable (E1).
When asserted (Low), the
Chip Enable, E1, activates the memory state ma-
chine, address buffers and decoders, allowing
Read and Write operations to be performed. When
de-asserted (High), all other pins are ignored, and
the device is put, automatically, in low-power
Standby mode.
Chip Enable (E2).
The Chip Enable, E2, puts the
device in Power-down mode (Deep Power-Down,
PAR and Standby) when it is driven Low. One of
Upper
Lower
these, Deep Power-Down mode, is the lowest
power mode.
Output Enable (G).
The Output Enable, G, pro-
vides a high speed tri-state control, allowing fast
read/write cycles to be achieved with the common
I/O data bus.
Write Enable (W).
The Write Enable, W, controls
the Bus Write operation of the memory’s Com-
mand Interface.
Upper Byte Enable (UB).
The Upper Byte En-
able, UB, gates the data on the Upper Byte Data
Inputs/Outputs (DQ8-DQ15) to or from the upper
part of the selected address during a Write or
Read operation.
Lower Byte Enable (LB).
The Lower Byte En-
able, LB, gates the data on the Lower Byte Data
Inputs/Outputs (DQ0-DQ7) to or from the lower
part of the selected address during a Write or
Read operation.
V
CC
Supply Voltage.
The V
CC
Supply Voltage
supplies the power for all operations (Read, Write,
etc.) and for driving the refresh logic, even when
the device is not being accessed.
V
SS
Ground.
The V
SS
Ground is the reference for
all voltage measurements.
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| M69AW048BL70ZB8 | 32 Mbit (2M x16) 3V Asynchronous PSRAM |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M69AW048BL70ZB8 | 制造商:STMicroelectronics 功能描述: |
| M69AW048BL70ZB8T | 功能描述:静态随机存取存储器 32 MBIT (2M X16) 3V Asynch 静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| M69KB096AA | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Mbit (4M x16) 1.8V Supply, 80MHz Clock Rate, Burst PSRAM |
| M69KB096AA70CW8 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Mbit (4M x16) 1.8V Supply, 80MHz Clock Rate, Burst PSRAM |
| M69KB096AA85AW8 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Mbit (4M x16) 1.8V Supply, 80MHz Clock Rate, Burst PSRAM |
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