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参数资料
| 型号： | MA28151 |
| 厂商： | Dynex Semiconductor Ltd. |
| 英文描述： | Radiation hard Programmable Communication Interface |
| 中文描述： | 辐射硬可编程通信接口 |
| 文件页数： | 15/22页 |
| 文件大小： | 186K |
| 代理商： | MA28151 |
MA28151
15/22
5. AC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Min.
Max.
Units
Condition
t
CY
t
0
t
0
t
R
, t
F
t
DTX
t
TPW
Internal clock cycle time
External Clock high pulse width
External Clock low pulse width
Clock rise and fall time
TxD delay from falling edge of TxD
Transmitter input clock pulse width
200
25
25
-
-
12xt
CY
1xt
CY
15xt
CY
3xt
CY
12xt
CY
1xt
CY
15xt
CY
3xt
CY
-
-
-
-
20xt
CY
8xt
CY
20xt
CY
0
0
20
-
10
15
5
6xt
CY
1000
-
-
10
1
-
-
-
-
-
-
-
-
8xt
CY
45
26xt
CY
45
-
-
-
-
-
-
30
45
-
-
-
nS
nS
nS
nS
μ
S
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
-
Notes 1, 5, 6
-
-
-
-
1 x baud rate
16 x and 64 x baud rate
1 x baud rate
16 x and 64 x baud rate
1 x baud rate
16 x and 64 x baud rate
1 x baud rate
16 x and 64 x baud rate
Note 7
Note 7
Note 7
Note 7
Note 7
Note 7
Note 7
Note 2
Note 2
-
Note 3
Note 8
-
-
Note 4
t
TPD
Transmitter input clock pulse delay
t
RPW
Receive input clock pulse width
t
RPD
Receive input clock pulse delay
t
TxRDY
TxRDY pin delay from CENTER of last bit
TxRDY fall from falling DSN (WRITE)
RxRDY pin delay from center of last bit
RxRDY fall from falling DSN (READ)
TxEMPTY from centre of last bit
Control delay from rising edge of WRITE
Control to READ set-up time (
DSR
,
CTS
)
Address stable before DSN (CSN, CDN)
Address hold time before DSN (CSN, CDN)
DSN pulse width
Data delay from DSN falling (READ)
DSN rising to data floating (READ)
Data set-up time to DSN rising (WRITE)
Data hold time to DSN rising (WRITE)
Recovery time between writes (not shown)
t
TxRDY CLEAR
t
RxRDY
t
RxRDY CLEAR
t
TxEMPTY
t
WC
t
CR
t
AR
t
RA
t
RR
t
RD
t
DF
t
DW
t
WD
t
RV
Notes: 1. AC Timings measured V
OH
= 1.5 V
OL
= 1.5.
2. CSN and Command/Data are considered as addresses.
3. Assumes that address is valid before DSN goes low.
4. This recovery time is for Mode Initialisation only. Write data is allowed when TxRDY = 1. Recovery time between
writes for Asynchronous Mode is 8xt
CY
and for Synchronous Mode is 16xt
CY
.
5. The
TxC
and
RxC
frequencies have the following limitation with respect to clock: For 1 x baudrate, f
TX
or f
RX
≤
1/
(30t
CY
): For 16 x and 64 x baud rate, f
TX
or f
RX
≤
1/(4.5t
CY
).
6. Reset Pulse Width = 6t
CY
minimum; System clock must be running during Reset.
7. Status update can have a maximum delay of 28 clock periods from the event affecting the status.
8. Data Bus connected to V
DD
via loads of 680
(minimum).
Mil-Std-883, method 5005, subgroups 9, 10, 11
Figure 23: AC Electrical Characteristics
Symbol
Parameter
Min.
Max.
Units
Condition
-
Clock Frequency (osc)
Transmitter input clock frequency
-
20
64
310
615
64
310
615
MHz
kHz
kHz
kHz
kHz
kHz
kHz
-
f
Tx
DC
DC
DC
DC
DC
DC
1 x baud rate
16 x baud rate
64 x baud rate
1x baud rate
16 x baud rate
64 x baud rate
f
Rx
Receiver input clock frequency
Mil-Std-883, method 5005, subgroups 7, 8A, 8B
Figure 24: Operating AC Electrical Characteristics
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相关代理商/技术参数 |
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|---|---|
| MA28151GBB | 功能描述:专用陶瓷电容器 HF CHIP RoHS:否 制造商:Panasonic Electronic Components 电容:470 pF 容差:10 % 电压额定值:250 VAC 工作温度范围:- 25 C to + 125 C 端接类型:SMD/SMT 外壳代码 - in: 外壳代码 - mm: |
| MA28151GBN | 功能描述:专用陶瓷电容器 HF CHIP RoHS:否 制造商:Panasonic Electronic Components 电容:470 pF 容差:10 % 电压额定值:250 VAC 工作温度范围:- 25 C to + 125 C 端接类型:SMD/SMT 外壳代码 - in: 外壳代码 - mm: |
| MA28151JBB | 功能描述:专用陶瓷电容器 HF CHIP RoHS:否 制造商:Panasonic Electronic Components 电容:470 pF 容差:10 % 电压额定值:250 VAC 工作温度范围:- 25 C to + 125 C 端接类型:SMD/SMT 外壳代码 - in: 外壳代码 - mm: |
| MA28151JBN | 功能描述:专用陶瓷电容器 HF CHIP RoHS:否 制造商:Panasonic Electronic Components 电容:470 pF 容差:10 % 电压额定值:250 VAC 工作温度范围:- 25 C to + 125 C 端接类型:SMD/SMT 外壳代码 - in: 外壳代码 - mm: |
| MA28151KBB | 功能描述:专用陶瓷电容器 HF CHIP RoHS:否 制造商:Panasonic Electronic Components 电容:470 pF 容差:10 % 电压额定值:250 VAC 工作温度范围:- 25 C to + 125 C 端接类型:SMD/SMT 外壳代码 - in: 外壳代码 - mm: |
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