参数资料
型号: MACH111SP-5VC
厂商: LATTICE SEMICONDUCTOR CORP
元件分类: PLD
英文描述: High-Performance EE CMOS Programmable Logic
中文描述: EE PLD, 5 ns, PQFP44
封装: TQFP-44
文件页数: 48/48页
文件大小: 1136K
代理商: MACH111SP-5VC
MACH 1 & 2 Families
9
n
From
Logic
Allocator
To Switch
Matrix
To
I/O
Cell
a. Combinatorial, active high
n
From
Logic
Allocator
To Switch
Matrix
To
I/O
Cell
b. Combinatorial, active low
n
To Switch
Matrix
c. D-type register, active high
AP
AR
DQ
n
To Switch
Matrix
d. D-type register, active low
AP
AR
DQ
AP
AR
T
Q
n
To Switch
Matrix
e. T-type register, active high
f. T-type register, active low
AP
AR
T
Q
n
To Switch
Matrix
n
To Switch
Matrix
g. Latch, active high (MACH 2 only)
n
To Switch
Matrix
h. Latch, active low (MACH 2 only)
AP
AR
L
Q
G
CLKn
CLK0
CLKn
CLK0
CLKn
CLK0
CLKn
CLK0
CLKn
CLK0
CLKn
CLK0
AP
AR
L
Q
G
Figure 4. Output Macrocell Congurations
From
Logic
Allocator
To
I/O
Cell
From
Logic
Allocator
To
I/O
Cell
From
Logic
Allocator
To
I/O
Cell
From
Logic
Allocator
To
I/O
Cell
From
Logic
Allocator
To
I/O
Cell
From
Logic
Allocator
To
I/O
Cell
14051K-005
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