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参数资料
| 型号： | MAX11040GUU+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/35页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 4CH 38-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 位数： | 24 |
| 采样率（每秒）： | 64k |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 4 |
| 功率耗散（最大）： | 108mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 38-TFSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 38-TSSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 4 个差分，双极 |
| 配用： | MAXSPCSPARTAN6+-ND - ADC and DAC Eval Expansion Board |
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MAX11040K/MAX11060
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
17
Maxim Integrated
DRDYIN, and DRDYOUT. For single-device applications,
connect CASCIN and DRDYIN to DGND and drive CS
low to transfer data in and out of the devices. With
DRDYIN low, a falling edge at the data-ready signal out-
put (DRDYOUT) indicates that new conversion results
are available for reading in the 96-bit data register. A
falling edge on SCLK clocks in data at DIN. Data at
DOUT changes on the rising edge of SCLK and is valid
on the falling edge of SCLK. DIN and DOUT are trans-
ferred MSB first. Drive CS high to disable the interface
and place DOUT in a high-impedance state.
An interface operation with the devices takes effect on
the last rising edge of SCLK. If CS goes high before the
complete transfer, the write is ignored. Every data
transfer is initiated by the command byte. The com-
mand byte consists of an R/W bit and 7 address bits
(see Table 2.) Figures 7 and 8 show the timing for read
and write operations, respectively.
tCSW
SCLK
CS
DIN
DOUT
DRDYIN
HIGH-Z
B7 B6 B5 B4 B3 B2 B1 B0
tSU
tSCP
tDCD
tCSH1
tSU
tDOE
tDRDY
DATA READY
tHD
COMMAND ADDRESS
tDOT
tPW
R/W A6 A5
A3 A2 A1 A0
A4
DATA LENGTH (NUMBER OF BYTES) DEPENDS
ON THE REGISTER BEING READ (SEE TABLE 2)
DRDYOUT
Figure 7. General Read-Operation Timing Diagram
DOUT
HIGH-Z
tCSW
tSU
tHD
tSU
tPW
tSCP
tPW
tCSH1
CS
DIN
SCLK
A6 A5
A3 A2 A1 A0
B7 B6 B5 B4 B3 B2 B1
R/W
B0
DATA LENGTH (NUMBER OF BYTES) DEPENDS ON
THE REGISTER BEING WRITTEN (SEE TABLE 2)
A4
Figure 8. General Write-Operation Timing Diagram
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX11040K | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:24-/16-Bit, 4-Channel, Simultaneous-Sampling, Cascadable, Sigma-Delta ADCs |
| MAX11040K_1111 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:24-/16-Bit, 4-Channel, Simultaneous-Sampling, Cascadable, Sigma-Delta ADCs |
| MAX11040K_12 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:MAX11040K Evaluation Kit/Daughterboard |
| MAX11040KDBEVKIT | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:MAX11040K Evaluation Kit/Daughterboard |
| MAX11040KDBEVKIT# | 功能描述:数据转换 IC 开发工具 MAX5135/11040/11612 Eval Kit w/ FMC RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
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