- 您现在的位置：买卖IC网 > PDF目录20147 > MAX1368ECM+T (Maxim Integrated)IC PANEL METER 3.5 DIG 48LQFP PDF资料下载
参数资料
| 型号： | MAX1368ECM+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 22/36页 |
| 文件大小： | 0K |
| 描述： | IC PANEL METER 3.5 DIG 48LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 显示器类型： | LED |
| 配置： | 7 段显示 |
| 接口： | 串行 |
| 数字或字符： | A/D，3.5 位数字 |
| 电源电压： | 2.7 V ~ 5.25 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页当前第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页
Microcontroller-Interface, 4.5-/3.5-Digit Panel
Meters with 4–20mA Output
Applications Information
Power-On Reset
At power-on, the serial interface, logic, LED drivers,
digital filter, modulator, and DAC circuits reset. The
registers return to their default values.
Serial Interface
The SPI/QSPI/MICROWIRE serial interface consists of a
chip select ( CS ), a serial clock (SCLK), a data in (DIN),
a data out (DOUT), DAC chip select ( CS_DAC ), and an
EOC output. CS and CS_DAC enable access to regis-
ters in the MAX1366/MAX1368. CS allows a read and
write to all registers of the MAX1366/MAX1368 exclud-
ing the DAC register and CS_DAC enables a write to
the DAC register (see Table 8 ). EOC provides an end-
of-conversion signal with a period of 200ms (f CLK =
4.9152MHz). The MAX1366/MAX1368 update the ADC
register when EOC goes high. Data is valid in the ADC
register when EOC returns low. The serial interface pro-
vides access to 13 on-chip registers, allowing control to
all the power modes and functional blocks. Table 6 lists
the address and read/write accessibility of all the regis-
ters excluding the DAC register.
A logic-high on CS and CS_DAC tri-states DOUT and
causes the MAX1366/MAX1368 to ignore any signals
on SCLK and DIN. To clock data in or out of the internal
shift register, drive CS or CS_DAC low. SCLK synchro-
nizes the data transfer. The rising edge of SCLK clocks
DIN into the shift register, and the falling edge of SCLK
clocks DOUT out of the shift register. DIN and DOUT
are transferred MSB first (data is left justified). Figures
6–10 show the detailed serial-interface timing diagrams
for the 8- and 16-bit read/write operations.
All communication with the MAX1366/MAX1368, with
exception of the DAC register, begins with a command
byte on DIN, where the first logic one on DIN is recog-
nized as the START bit (MSB) for the command byte.
The following seven clock cycles load the command
into a shift register. These 7 bits specify which of the
registers are accessed next, and whether a read or
write operation takes place. Transitions on the serial
clock after the command byte transfer, cause a write or
read from the device until the correct number of bits
have been transferred (8 or 16). Once this has
occurred, the MAX1366/MAX1368 wait for the next
command byte. CS must not go high between data
transfers. If CS is toggled before the end of a write or
read operation, the device mode may be unknown.
Clock in 32 zeros to clear the device state and reset the
interface so it is ready to receive a new command byte.
To write to the DAC register, pull CS_DAC low and
clock in 16 data bits. Data bits are clocked in MSB first
(see the DAC Operation section).
On-Chip Registers (Excluding
DAC Register)
The MAX1366/MAX1368 contain 12 on-chip registers.
These registers configure the various functions of the
device and allow independent reading of the ADC
results and writing to the LED display. Table 6 lists the
address and size of each register. The first of these
registers is the status register. The 8-bit status register
contains the status flags for the ADC. The second reg-
ister is the 16-bit control register. This register sets the
LED display controls, range modes, power-down
modes, offset calibration, and the reset register func-
tion (CLR). The third register is the 16-bit overrange
register, which sets the overrange limit of the analog
input. The fourth register is the 16-bit underrange regis-
ter, which sets the underrange limit of the analog input.
Registers 5 through 7 contain the display data for the
individual segments of the LED. The eighth register
contains the custom offset value. The ninth register
contains the 16 MSBs of the ADC conversion result.
The 10th register contains the LED data. The 11th reg-
ister contains the peak analog input value. The last reg-
ister contains the lower 4 LSBs of the 20-bit ADC
conversion result.
22
______________________________________________________________________________________
相关PDF资料 |
PDF描述 |
|---|---|
| VI-22P-CX-F1 | CONVERTER MOD DC/DC 13.8V 75W |
| PSAA60M-150-R-CN1 | ADAPTER DESKTOP CLASS I 60W 15V |
| T95R156M050EZSS | CAP TANT 15UF 50V 20% 2824 |
| A121K15X7RK5UAA | CAP CER 120PF 200V 10% X7R AXIAL |
| ISL9008IEMZ-T | IC REG LDO 3V .15A SC70 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX136C/D | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX136CJL | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX136CMH | 制造商:Maxim Integrated Products 功能描述:44 PINS MQFP PKG - Bulk 制造商:Rochester Electronics LLC 功能描述: |
| MAX136CMH+ | 制造商:Maxim Integrated Products 功能描述:ADC SGL DUAL SLOPE 3 1/2DIGIT LCD 44MQFP - Rail/Tube |
| MAX136CMH+D | 功能描述:模数转换器 - ADC Low-Pwr 3 1/2 Digit ADC 2.5sps RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
发布紧急采购，3分钟左右您将得到回复。