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参数资料
| 型号： | MAX1421CCM+D |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/17页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 40MSPS 48LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 250 |
| 位数： | 12 |
| 采样率（每秒）： | 40M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 214mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 托盘 |
| 输入数目和类型： | 1 个差分，双极 |
MAX1421
12-Bit, 40Msps, 3.3V, Low-Power ADC
with Internal Reference
_______________________________________________________________________________________
5
Note 1: Internal reference, REFIN bypassed to AGND with a combination of 0.22F in parallel with 1nF capacitor.
Note 2: External 2.048V reference applied to REFIN.
Note 3: Internal reference disabled. VREFIN = 0, VREFP = 2.162V, VCML = 1.65V, and VREFN = 1.138V.
Note 4: IMD is measured with respect to either of the fundamental tones.
Note 5: Specifies the common-mode range of the differential input signal supplied to the MAX1421.
Note 6: VDIFF = VREFP - VREFN.
Note 7: Input bandwidth is measured at a 3dB level.
Note 8: VREFIN is internally biased to 2.048V through a 10k
resistor.
Note 9: Measured as the ratio of the change in mid-scale offset voltage for a ± 5% change in VAVDD using the internal reference.
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VDVDD = 3.3V, AGND = DGND = 0, VIN = ±1.024V, differential input voltage at -0.5dB FS, internal reference,
fCLK = 40MHz (50% duty cycle), digital output load CL
≈ 10pF, TA ≥ +25°C guaranteed by production test, TA < +25°C guarnateed
by design and characterization. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Pipeline Delay (Latency)
Figure 5
7
fCLK
cycles
Aperture Delay
tAD
Figure 9
2
ns
Aperture Jitter
tAJ
Figure 9
2
ps
Data Output Delay
tOD
Figure 5
5
10
14
ns
Bus Enable Time
tBE
Figure 4
5
ns
Bus Disable Time
tBD
Figure 4
5
ns
Typical Operating Characteristics
(VAVDD = VDVDD = 3.3V, AGND = DGND = 0, VIN = ±1.024V, differential input voltage, fCLK = 40MHz (50% duty cycle), digital output
load CL = 10pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
-120
-80
-100
-40
-60
-20
0
010
515
20
FFT PLOT, 4096-POINT RECORD,
DIFFERENTIAL INPUT
MAX1421
toc01
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE
(dB)
fIN = 7.54MHz
AIN = -0.45dB FS
HD3
HD2
-120
-80
-100
-40
-60
-20
0
010
515
20
FFT PLOT, 4096-POINT RECORD,
DIFFERENTIAL INPUT
MAX1421
toc02
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE
(dB)
fIN = 19.90MHz
AIN = -0.50dB FS
HD2
HD3
fIN
-120
-80
-100
-40
-60
-20
0
010
515
20
FFT PLOT, 4096-POINT RECORD,
DIFFERENTIAL INPUT
MAX1421
toc03
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE
(dB)
fIN = 38.54MHz
AIN = -0.49dB FS
HD3
HD2
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