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参数资料
| 型号： | MAX1421CCM+D |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 17/17页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 40MSPS 48LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 250 |
| 位数： | 12 |
| 采样率（每秒）： | 40M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 214mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 托盘 |
| 输入数目和类型： | 1 个差分，双极 |
MAX1421
12-Bit, 40Msps, 3.3V, Low-Power ADC
with Internal Reference
_______________________________________________________________________________________
9
PIN
NAME
FUNCTION
1, 4, 5, 8,
9, 12, 13,
16, 19, 41,
48
AGND
Analog Ground. Connect all return paths for analog signals to AGND.
2, 3, 10,
11, 14, 15,
20, 42, 47
AVDD
Analog Supply Voltage. For optimum performance bypass each pin to the closest AGND with a
parallel combination of a 0.1F and a 1nF capacitor. Connect a single 10F and 1F capacitor
combination between AVDD and AGND.
6
INP
Positive Analog Signal Input
7
INN
Negative Analog Signal Input
17
CLK
Clock Frequency Input. Clock frequency input ranges from 100kHz to 40MHz.
18
CLK
Complementary Clock Frequency Input. This input is used for differential clock inputs. If the ADC is
driven with a single-ended clock, bypass CLK with a 0.1F capacitor to AGND.
21, 31, 32,
DVDD
Digital Supply Voltage. For optimum performance bypass each pin to the closest DGND with a
parallel combination of a 0.1F and a 1nF capacitor. Connect a single 10F and 1F capacitor
combination between DVDD and DGND.
22, 29, 30
DGND
Digital Ground
23–28
D0–D5
Digital Data Outputs. Data bits D0 through D5, where D0 represents the LSB.
33–38
D6–D11
Digital Data Outputs. D6 through D11, where D11 represents the MSB.
39
OE
Output Enable Input. A logic “1” on OE places the outputs D0–D11 into a high-impedance state. A
logic “0” allows for the data bits to be read from the outputs.
40
PD
Shutdown Input. A logic “1” on PD places the ADC into shutdown mode.
43
REFIN
External Reference Input. Bypass to AGND with a capacitor combination of 0.22F in parallel with
1nF. REFIN can be biased externally to adjust reference levels and calibrate full-scale errors. To
disable the internal reference, connect REFIN to AGND.
44
REFP
Positive Reference I/O. Bypass to AGND with a capacitor combination of 0.22F in parallel with 1nF.
With the internal reference disabled (REFIN = AGND), REFP should be biased to VCML + VDIFF / 2.
45
REFN
Negative Reference I/O. Bypass to AGND with a capacitor combination of 0.22F in parallel with 1nF.
With the internal reference disabled (REFIN = AGND), REFN should be biased to VCML - VDIFF / 2.
46
CML
Common-Mode Level Input. Bypass to AGND with a capacitor combination of 0.22F in parallel
with 1nF. With the internal reference disabled (REFIN = AGND).
Pin Description
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1421CCM-TD | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1421ECM | 制造商:Maxim Integrated Products 功能描述:48 PINS TQFP PKG - Bulk |
| MAX1421ECM+ | 制造商:Maxim Integrated Products 功能描述:IC ADC LOW POWER 12BIT 3.3V SMD |
| MAX1421ECM+D | 功能描述:模数转换器 - ADC 12-Bit 40Msps 3.3V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1421ECM+TD | 功能描述:模数转换器 - ADC 12-Bit 40Msps 3.3V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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