参数资料
型号: MAX15046BAEE+T
厂商: Maxim Integrated Products
文件页数: 18/24页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 16-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.1MHz
占空比: 87.5%
电源电压: 4.5 V ~ 40 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-LSSOP(0.154",3.90mm 宽)裸露焊盘
包装: 带卷 (TR)
MAX15046
40V, High-Performance, Synchronous
Buck Controller
So:
Once f P2 is known, calculate R I :
C F =
1
2 π × R F × 0.8 × f PO
R I =
1
2 π × f P2 × C I
2) The gain of the modulator (GAIN MOD ), comprised of
the pulse-width modulator, LC filter, feedback divider,
and associated circuitry at crossover frequency is:
4) Place the second zero (f Z2 ) at 0.2 x f O or at f PO ,
whichever is lower and calculate R 1 using the following
equation:
(2 π × f O ) × L OUT × C OUT
MOD
GAIN =
V IN
V RAMP
×
2
1
R 1 =
1
2 π × f Z2 × C I
- R I
The gain of the error amplifier (GAIN EA ) in midband
frequencies is:
5) Place the third pole (f P3 ) at one half the switching
frequency and calculate C CF :
GAIN EA = 2 π × f O × C I × R F
The total loop gain as the product of the modulator gain
C CF =
C F
( 2 π × 0.5 × f SW × R F × C F ) - 1
and the error amplifier gain at f O is 1.
6) Calculate R 2 as:
So :
1
GAIN MOD × GAIN EA =
R 2
=
V FB
V OUT ? V FB
× R 1
V IN 1
) 2 × C
C I = RAMP O OUT OUT
× × 2 π × f O × C I × R F = 1
V RAMP (2 π × f O OUT × L OUT
Solving for C I :
V × ( 2 π × f × L × C )
V IN × R F
3) Use the second pole (f P2 ) to cancel f ZO when f PO < f O
< f ZO < f SW/2 . The frequency response of the loop gain
does not flatten out soon after the 0dB crossover, and
maintains -20dB/decade slope up to 1/2 of the switching
frequency. This is likely to occur if the output capacitor
is low-ESR tantalum. Set f P2 = f ZO .
When using a ceramic capacitor, the capacitor ESR
zero (f ZO ) is likely to be located even above one half
of the switching frequency, f PO < f O < f SW/2 < f ZO . In
this case, place the frequency of the second pole (f P2 )
high enough in order not to significantly erode the phase
margin at the crossover frequency. For example, set f P2
at 5 x f O so that the contribution to phase loss at the
crossover frequency f O is only about 11 N :
f P2 = 5 x f O
18
MOSFET Selection
The MAX15046 step-down controller drives two exter-
nal logic-level n-channel MOSFETs. The key selection
parameters to choose these MOSFETs include:
U On-resistance (R DS(ON) )
U Maximum Drain-to-Source Voltage (V DS(MAX) )
U Minimum Threshold Voltage (V TH(MIN) )
U Total Gate Charge (Q G )
U Reverse Transfer Capacitance (C RSS )
U Power Dissipation
The two n-channel MOSFETs must be a logic-level
type with guaranteed on-resistance specifications at
V GS = 4.5V. For maximum efficiency, choose a high-
side MOSFET that has conduction losses equal to the
switching losses at the typical input voltage. Ensure that
the conduction losses at minimum input voltage do not
exceed the MOSFET package thermal limits, or violate
the overall thermal budget. Also ensure that the conduc-
tion losses plus switching losses at the maximum input
voltage do not exceed package ratings or violate the
Maxim Integrated
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MAX15046CAEE+T 功能描述:DC/DC 开关控制器 40V Synch Buck Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK
MAX15046EEE+ 功能描述:DC/DC 开关控制器 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK