参数资料
型号: MAX15046BAEE+T
厂商: Maxim Integrated Products
文件页数: 8/24页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 16-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.1MHz
占空比: 87.5%
电源电压: 4.5 V ~ 40 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-LSSOP(0.154",3.90mm 宽)裸露焊盘
包装: 带卷 (TR)
MAX15046
40V, High-Performance, Synchronous
Buck Controller
Pin Description
8
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
IN
V CC
PGOOD
EN
LIM
COMP
FB
RT
GND
PGND
DRV
DL
BST
LX
DH
CSP
EP
FUNCTION
Regulator Input. Connect to the input rail of the buck converter. Bypass IN to PGND with a 100nF
minimum ceramic capacitor. When operating in the 5V Q 10% range, connect IN to V CC .
5.25V Linear Regulator Output. Bypass V CC to PGND with a ceramic capacitor of at least 4.7 F F
when V CC supplies MOSFET gate-driver current at DRV or 2.2 F F when V CC is not used to power
DRV.
Open-Drain Power-Good Output. Pull up PGOOD to an external power supply or output with an
external resistor.
Active-High Enable Input. Pull EN to GND to disable the buck converter output. Connect to V CC
for always-on operation. EN can be used for power sequencing and as a UVLO adjustment input.
Current-Limit Input. Connect a resistor from LIM to GND to program the current-limit threshold from
30mV (R LIM = 6k I ) to 300mV (R LIM = 60k I ).
Error-Amplifier Output. Connect compensation network from COMP to FB or from COMP to GND.
Feedback Input (Inverting Input of Error Amplifier). Connect FB to a resistive divider between the
buck converter output and GND to adjust the output voltage from 0.6V up to 0.85 x IN.
Oscillator-Timing Resistor Input. Connect a resistor from RT to GND to set the oscillator frequency
from 100kHz to 1MHz.
Analog Ground. Connect PGND and AGND together at a single point.
Power Ground. Use PGND as a return path for the low-side MOSFET gate driver.
Gate-Driver Supply Voltage. DRV is internally connected to the low-side driver supply. Bypass DRV to
PGND with a 2.2 F F minimum ceramic capacitor (see the Typical Application Circuits ).
Low-Side External MOSFET Gate-Driver Output. DL swings from DRV to PGND.
Boost Flying Capacitor Connection. Internally connected to the high-side driver supply. Connect a
ceramic capacitor of at least 100nF between BST and LX and a diode between BST and DRV for
the high-side MOSFET gate-driver supply.
Inductor Connection. Also serves as a return terminal for the high-side MOSFET driver current.
Connect LX to the switching side of the inductor.
High-Side External MOSFET Gate-Driver Output. DH swings from BST to LX.
Current-Sense Positive Input. Connect to the drain of low-side MOSFET with Kelvin connection.
Exposed Pad. Connect EP to a large copper ground plane to maximize thermal performance.
Maxim Integrated
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