参数资料
型号: MAX15109EWP+T
厂商: Maxim Integrated Products
文件页数: 10/19页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 8A 20WLP
标准包装: 2,500
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 可编程
输入电压: 2.7 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 1MHz
电流 - 输出: 8A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: *
封装/外壳: *
包装: *
供应商设备封装: *
High-Efficiency, 8A, Current-Mode Synchronous
Step-Down Switching Regulator with VID Control
Detailed Description
The MAX15109 high-efficiency, current-mode switch-
ing regulator delivers up to 8A of output current. The
regulator operates from 2.7V to 5.5V and provides a VID
selectable output.
The IC current-mode control architecture uses a high
gain transconductance error amplifier that facilitates an
easy compensation design and ensures cycle-by-cycle
current limit with fast response to line and load transients.
The regulator features a 1MHz fixed switching fre-
quency, allowing for all-ceramic capacitor designs with
fast transient responses. The high operating frequency
minimizes the size of external components. The IC is
available in a 2.5mm x 2mm (4 x 5 array), 0.5mm pitch
WLP package.
The regulator offers skip-mode functionality to reduce
current consumption and achieve a high efficiency at
light output loads. The low R DS(ON) integrated switches
ensure high efficiency at heavy loads while minimizing
critical inductance, making the layout design a much
simpler task than that of discrete solutions. The IC’s
simple layout and footprint assure first-pass success in
new designs.
The IC has output voltages of 0.9V, 0.8V, 0.725V, and
0.625V by configuring the VID inputs. The regulator
offers capacitor-programmable soft-start to reduce input
inrush current. The device safely starts up into a prebi-
ased output. The IC includes an enable input and open-
drain PGOOD output for sequencing with other devices.
Controller Function — PWM Logic
The controller logic block determines the duty cycle of
the high-side MOSFET under different line, load, and
temperature conditions. Under normal operation, where
the current-limit and temperature protection are not trig-
gered, the controller logic block takes the output from
the PWM comparator to generate the driver signals for
both high-side and low-side MOSFETs. The control logic
block controls the break-before-make logic and all the
necessary timing.
The high-side MOSFET turns on at the beginning of the
oscillator cycle and turns off when the COMP voltage
crosses the internal current-mode ramp waveform. The
internal ramp is the sum of the compensation ramp and
the current-mode ramp. The high-side MOSFET also
turns off if the maximum duty cycle exceeds 95%, or
when the current limit is reached. The low-side MOSFET
turns on for the remainder of the switching cycle.
Starting into a Prebiased Output
The IC can soft-start into a prebiased output with-
out discharging the output capacitor. In safe prebi-
ased startup, both low-side and high-side MOSFETs
remain off to avoid discharging the prebiased out-
put. PWM operation starts when the voltage on
SS crosses the voltage on FB.
The IC can start into a prebiased voltage higher than the
nominal set point without abruptly discharging the out-
put. Forced PWM operation starts when the SS voltage
reaches 0.58V, forcing the converter to start. When the
low-side sink current-limit threshold of 14A is reached,
the low-side switch turns off before the end of the clock
period. The low-side sink current limit is 14A. The high-
side switch turns on until one of the following conditions
is satisfied:
?  High-side source current hits the reduced high-side 
current limit (14A). The high-side switch turns off for
the remaining time of clock period.
?  The clock period ends.
Reduced high-side current limit is activated in order to
recirculate the current into the high-side power switch
rather than into the internal high-side body diode, which
can cause damage to the devices. The high-side current
limit is set to 14A.
Low-side sink current limit protects the low-side switch
from excessive reverse current during prebiased
operation.
Enable Input
The IC features independent device enable control and
power-good signal that allow for flexible power sequenc-
ing. Drive the enable input (EN) high to enable the
regulator, or connect EN to IN for always-on operation.
Power-good (PGOOD) is an open-drain output that goes
high when V FB is above the PGOOD threshold, and goes
low if V FB is below the PGOOD threshold.
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