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参数资料
| 型号： | MAX15109EWP+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 14/19页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 8A 20WLP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 可编程 |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 8A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | * |
| 封装/外壳： | * |
| 包装： | * |
| 供应商设备封装： | * |
High-Efficiency, 8A, Current-Mode Synchronous
Step-Down Switching Regulator with VID Control
Compensation Design Guidelines
The IC uses a fixed-frequency, peak-current-mode con-
trol scheme to provide easy compensation and fast tran-
sient response. The inductor peak current is monitored
β
= G MOD × R LOAD ×
( sC OUT ESR + 1 )
? ?
? sC OUT ( ESR + R LOAD ) + 1 ?
R 2 A VEA
on a cycle-by-cycle basis and compared to the COMP
voltage (output of the voltage error amplifier). The regu-
lator’s duty cycle is modulated based on the inductor’s
Gain
=
× ×α×β
R 1 + R 2 R OUT
R 2 V FB
peak current value. This cycle-by-cycle control of the
inductor current emulates a controlled current source.
As a result, the inductor’s pole frequency is shifted
beyond the gain bandwidth of the regulator. System
stability is provided with the addition of a simple series
capacitor-resistor from COMP to PGND. This pole-zero
combination serves to tailor the desired response of the
closed-loop system. The basic regulator loop consists
of a power modulator (comprising the regulator’s pulse-
width modulator, compensation ramp, control circuitry,
MOSFETs, and inductor), the capacitive output filter
where R OUT is the quotient of the error amplifier’s DC
gain, A VEA , divided by the error amplifier’s transconduc-
tance, g MV ; R OUT is much larger than R C .
=
R 1 + R 2 V OUT
Also, C C is much larger than C CC , therefore:
C C + C CC ≈ C C
and load, an output feedback, and a voltage-loop error
amplifier with its associated compensation circuitry. See
Figure 1.
and
C C || C CC ≈ C CC
V FB ( sC C R C + 1
? A VEA ?
? sC C ? ? + 1 ? × ( sC CC R C + 1 )
( sC OUT ESR + 1 )
? ? sC OUT ( ESR + R LOAD ) + 1 ? ?
f P1 =
The average current through the inductor is expressed
as:
I L
= G MOD × V COMP
where I L is the average inductor current and G MOD is
the power modulator’s transconductance.
For a buck converter:
V OUT
= R LOAD × I L
where R LOAD is the equivalent load resistor value.
Combining the above two relationships, the power mod-
ulator’s transfer function in terms of V OUT with respect
to V COMP is:
Rewriting:
A VEA ×
Gain = ×
V OUT ? ?
? ?
? ? g MV ? ?
G MOD R LOAD ×
The dominant poles and zeros of the transfer loop gain
are shown below:
g MV
2 π × 10 AVEA_dB/20 × C C
V FB R LOAD × I L
= = R LOAD × G MOD
V COMP I L
G MOD
f P2 =
1
2 π × C OUT ( ESR + R LOAD )
Having defined the power modulator’s transfer function
gain, the total system loop gain can be written as follows
f P3 =
1
2 π × C CC R C
R OUT × ( sC C R C + 1 )
? ? s ( C C CC )( R C OUT ) + 1 ? ? ×
f Z1 =
f Z2 =
(see Figure 1):
α=
+ C + R
? ?
? s ( C C || C CC )( R C || R OUT ) + 1 ?
1
2 π × C C R C
1
2 π × C OUT ESR
14
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