参数资料
型号: MAX17003ETJ+T
厂商: Maxim Integrated Products
文件页数: 29/36页
文件大小: 0K
描述: IC PS CTRLR FOR NOTEBOOKS 32TQFN
标准包装: 2,500
应用: 控制器,笔记本电脑电源系统
输入电压: 6 V ~ 26 V
输出数: 4
输出电压: 3.3V,5V,2 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 带卷 (TR)
High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers
f ESR ≤ OSC
The  actual  capacitance  value  required  relates  to  the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lums, OS-CONs, polymers, and other electrolytics).
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent V SAG and V SOAR from
causing problems during load transients. Generally,
once enough capacitance is added to meet the over-
shoot requirement, undershoot at the rising load edge
is no longer a problem (see the V SAG and V SOAR equa-
tions in the Transient Response section). However, low-
capacity filter capacitors typically have high ESR zeros
that may affect the overall stability (see the Output-
Capacitor Stability Considerations section).
Output-Capacitor Stability Considerations
Stability is determined by the value of the ESR zero rel-
ative to the switching frequency. The boundary of insta-
bility is given by the following equation:
f
π
where:
For low-input voltage applications where the duty cycle
exceeds 50% (V OUT /V IN ≥ 50%), the output ripple voltage
should not be greater than twice the internal slope-
compensation voltage:
V RIPPLE ≤ 0.02 x V OUT
where V RIPPLE equals Δ I INDUCTOR x R ESR . The worst-
case ESR limit occurs when V IN = 2 x V OUT , so the
above equation may be simplified to provide the follow-
ing boundary condition:
R ESR ≤ 0.04 x L x f SW
Do not put high-value ceramic capacitors directly
across the feedback sense point without taking precau-
tions to ensure stability. Large ceramic capacitors can
have a high-ESR zero frequency and cause erratic,
unstable operation. However, it is easy to add enough
series resistance by placing the capacitors a couple of
inches downstream from the feedback sense point,
which should be as close as possible to the inductor.
Unstable operation manifests itself in two related but
distinctly different ways: short/long pulses and cycle
skipping resulting in lower frequency operation.
Instability occurs due to noise on the output or because
the ESR is so low that there is not enough voltage ramp
in the output voltage signal. This “fools” the error com-
parator into triggering too early or into skipping a cycle.
f ESR =
1
2 π R ESR C OUT
Cycle skipping is more annoying than harmful, resulting
in nothing worse than increased output ripple.
However, it can indicate the possible presence of loop
For a typical 300kHz application, the ESR zero frequen-
cy must be well below 95kHz, preferably below 50kHz.
Tantalum and OS-CON capacitors in widespread use
at the time of publication have typical ESR zero fre-
quencies of 25kHz. In the design example used for
inductor selection, the ESR needed to support 25mV P-P
ripple is 25mV/1.5A = 16.7m Ω . One 220μF/4V Sanyo
polymer (TPE) capacitor provides 15m Ω (max) ESR.
This results in a zero at 48kHz, well within the bounds
of stability.
instability due to insufficient ESR. Loop instability can
result in oscillations at the output after line or load
steps. Such perturbations are usually damped, but can
cause the output voltage to rise above or fall below the
tolerance limits.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output-voltage-ripple envelope for over-
shoot and ringing. It may help to simultaneously moni-
tor the inductor current with an AC current probe. Do
not allow more than three cycles of ringing after the ini-
tial step-response under/overshoot.
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