参数资料
型号: MAX17082GTL+T
厂商: Maxim Integrated Products
文件页数: 4/48页
文件大小: 0K
描述: IC CTLR PWM DUAL IMVP-6.5 40TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
系列: Quick-PWM™
应用: 控制器, Intel IMVP-6+,IMVP-6.5?
输入电压: 4.5 V ~ 5.5 V
输出数: 1
输出电压: 0.013 V ~ 1.5 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(5x5)
包装: 带卷 (TR)
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V IN = 10V, V CC = V DD = V SHDN = V PGDIN = V PSI = V ILIM = 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, V CSP1
= V CSN1 = V CSP2 = V CSN1 = 1.0000V, FB = FBAC, R FBAC = 3.57k Ω from FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
V SLOW = 5V; MAX17021: DPRSTP = GND; T A = 0°C to +85°C , unless otherwise noted. Typical values are at T A = +25°C.)
PARAMETER
Quiescent Supply Current
(V3P3)
Shutdown Supply Current
(V CC )
Shutdown Supply Current
(V DD )
Shutdown Supply Current
(V3P3)
SYMBOL
I 3P3
I CC,SDN
I DD,SDN
I 3P3,SDN
CONDITIONS
Measured at V3P3, FB forced within the CLKEN
power-good window
Measured at V CC , SHDN = GND, T A = +25°C
Measured at V DD , SHDN = GND, T A = +25°C
Measured at V3P3, SHDN = GND, T A = +25°C
MIN
TYP
2
0.01
0.01
0.01
MAX
4
1
1
1
UNITS
μA
μA
μA
μA
FAULT PROTECTION
Skip mode after output reaches the regulation
voltage or PWM mode; measured at FB with
respect to the voltage target set by the VID code;
250
300
350
mV
Output Overvoltage-
see Table 4.
Protection Threshold
(MAX17021/MAX17082 Only)
V OVP
Soft-start, soft-shutdown, skip
mode, and output have not
reached the regulation
voltage; measured at FB
IMVP-6.5
(MAX17082)
IMVP-6+
(MAX17021)
1.45
1.75
1.50
1.80
1.55
1.85
V
Output Overvoltage-
Minimum OVP threshold; measured at FB
0.8
Propagation Delay
t OVP
FB forced 25mV above trip threshold
10
μs
(MAX17021/MAX17082 Only)
Output Undervoltage-
Protection Threshold
Output Undervoltage-
Propagation Delay
CLKEN Startup Delay and
Boot Time Period
PWRGD Startup Delay
V UVP
t UVP
t BOOT
Measured at FB with respect to the voltage target
set by the VID code; see Table 4
FB forced 25mV below trip threshold
Measured from the time when FB reaches the
boot target voltage (Note 2)
Measured at startup from the time when CLKEN
goes low
-450
20
3
-400
10
60
6.5
-350
100
10
mV
μs
μs
ms
Lower threshold,
CLKEN and PWRGD
Threshold
Measured at FB with respect
to the voltage target set by
the VID code; see Table 4,
20mV hysteresis (typ)
falling edge
(undervoltage)
Upper threshold,
rising edge
-350
+150
-300
+200
-250
+250
mV
(overvoltage)
CLKEN and PWRGD Delay
PHASEGD Delay
FB forced 25mV outside the PWRGD trip
thresholds
V (CCI,FB) forced 25mV outside trip thresholds
10
10
μs
μs
4
_______________________________________________________________________________________
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