参数资料
型号: MAX19542EGK
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: ADC
英文描述: 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC68
封装: 10 X 10 MM, 0.9 MM HEIGHT, MO-220, QFN-68
文件页数: 8/24页
文件大小: 582K
代理商: MAX19542EGK
MAX19542
12-Bit, 170Msps ADC with CMOS
Outputs for Wideband Applications
16
______________________________________________________________________________________
Table 1. MAX19542 Digital Output Coding
INP ANALOG INPUT
VOLTAGE LEVEL
INN ANALOG INPUT
VOLTAGE LEVEL
OVERRANGE
ORA/ORB
BINARY
DIGITAL OUTPUT CODE
(D_11–D_0)
TWO’S-COMPLEMENT
DIGITAL OUTPUT CODE
(D_11–D_0)
> VREF + 0.35V
< VREF - 0.35V
1
1111 1111 1111
(exceeds +FS, OR set)
0111 1111 1111
(exceeds +FS, OR set)
VREF + 0.35V
VREF - 0.35V
0
1111 1111 1111
(+FS)
0111 1111 1111
(+FS)
VREF
0
1000 0000 0000 or
0111 1111 1111
(FS/2)
0000 0000 0000 or
1111 1111 1111
(FS/2)
VREF - 0.35V
VREF + 0.35V
0
0000 0000 0000
(-FS)
1000 0000 0000
(-FS)
< VREF + 0.35V
> VREF - 0.35V
1
00 0000 0000
(exceeds -FS, OR set)
10 0000 0000
(exceeds -FS, OR set)
Digital Outputs
(DA0–DA11, DCLKP, DCLKN, ORA,
DB0–DB11, ORB) and Control Input
T/B
Digital outputs DA0/DB0–DA11/DB11, DCLKP, DCLKN,
ORA/ORB are CMOS compatible, and data on DA0/DB
DA11/DB11 are presented in either binary or two’s-
complement format (Table 1). The
T/B control line is an
LVCMOS-compatible input that allows the user to select
the desired output format. Drive
T/B high to select data
to be output in offset binary format and drive it low to
select data to be output in two’s complement format on
the 12-bit parallel bus.
T/B has an internal pulldown
resistor and can be left unconnected in applications
using only two’s-complement output format. The CMOS
outputs are powered from a separate power supply that
can be operated between 1.7V and 1.9V.
The MAX19542 offers an additional differential output
pair (ORA, ORB) to flag overrange conditions, where
overrange is above positive or below negative full scale.
An overrange condition is identified with ORA/ORB tran-
sitioning high.
Note: Keep the capacitive load on the digital outputs as
low as possible. Use digital buffers on the digital out-
puts of the ADC when driving larger loads to improve
overall performance and reduce system timing con-
straints. Further improvements in dynamic performance
can be achieved by adding small series resistors
(100
) to the digital output paths, close to the ADC.
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