参数资料
型号: MAX6960ATH+T
厂商: Maxim Integrated
文件页数: 26/34页
文件大小: 0K
描述: IC DRVR LED 8X8 44-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
显示器类型: LED
配置: 8 x 8(矩阵)
接口: 4 线串行
数字或字符: 任何数字类型
电流 - 电源: 7.5mA
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 44-WFQFN 裸露焊盘
供应商设备封装: 44-TQFN-EP(7x7)
包装: 带卷 (TR)
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
Table 30. Global Plane Counter Register Format (continued)
PLANES/INTENSITY BIT
REGISTER DATA
REGISTER
(SEE TABLE 22):
0 FOR 1 BIT/PIXEL;
4 PLANES
1 FOR 2 BIT/PIXEL;
ADDRESS
CODE
(HEX)
D7
D6
D5
D4
D3
D2
D1
D0
2 PLANES
PLANE COUNTER
0x0B
Fast
slow
Auto
manual
Counter setting
Auto fast plane counter—2 frames per
second
Auto fast plane counter— 62 frames
per second
Auto fast plane counter— 63 frames
per second
0x0B
0x0B
0x0B
1
1
1
1
1
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
1
1
0
0
1
digit 1 in the same manner. The MAX6960 is guaran-
teed to drive 40mA peak segment current into a 2.4V
LED with a minimum supply voltage of 3.15V, and
20mA peak segment current into a 2.2V LED with a
minimum supply voltage of 2.7V.
Global Driver Indirect Address Register
The global driver indirect address register is used to
store the driver address identifying which of 256
MAX6960s is accessed for 16-bit transmission when a
local register is read (Table 28).
Global Display Indirect Address Register
The global display indirect address registers are used
to store the 14-bit display memory address identifying
which byte of display memory across all the intercon-
nected MAX6960s is written by an 8-bit transmission
(Table 29). The 14-bit address stored in these two reg-
isters increments after every 8-bit transmission, and
overflows from address 0x3FFF to address 0x0000.
Global Plane Counter
The global plane counter (Table 30) allows any display
plane to be selected as the current display plane, or
configures the MAX6960 for automatic plane sequenc-
ing. The display plane is switched to the newly selected
plane on the rising edge of CS at the end of the 16-bit
transmission. When automatic plane sequencing is
selected, the current display plane is initialized to plane
P0. The current display plane is incremented through
all four planes P0 –P3 (planes/intensity = 0) or both
planes P0–P1 (planes/intensity = 1) at the frame rate
selected, and then restarts at plane P0 again. The
26
plane sequencing continues until the global plane
counter is reconfigured. If the global plane counter is
used for the automatic sequencing of animations, the
user should ensure that the plane ahead of the current
display plane is updated before the automatic plane
switchover to achieve artifact-free animation.
Global Clear Planes Command
Writing the global clear planes counter (Table 31) allows
any or all display memory planes to be cleared with one
command. The selected plane(s) are cleared on the ris-
ing edge of CS at the end of the 16-bit transmission.
Fault Detection
LED Fault Detection
The MAX6960 detects open-circuit and short-circuit
LEDs. It can only detect an LED fault when attempting
to light that LED, so a good strategy to check a panel is
to program the panel with all LEDs on power-up to
check the displays.
The fault and device ID register (Table 32) uses 3 bits
to flag and distinguish open-circuit (open flag), short
circuit (short flag), and overtemperature (OT flag)
faults, and a fourth flag (fault flag), which is an OR of
the open flag, short flag, and OT flag.
The fault and device ID register is cleared on power-
up, and can also be cleared by writing to it. The fault
flags are NOT cleared by a read. When writing the fault
and device ID register, the data written is ignored; all
fault flags are cleared, including the OT flag. It is possi-
ble to clear all MAX6960s on a bus by performing a
global write to the fault and device ID register.
Maxim Integrated
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