参数资料
型号: MAX6960ATH+T
厂商: Maxim Integrated
文件页数: 5/34页
文件大小: 0K
描述: IC DRVR LED 8X8 44-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
显示器类型: LED
配置: 8 x 8(矩阵)
接口: 4 线串行
数字或字符: 任何数字类型
电流 - 电源: 7.5mA
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 44-WFQFN 裸露焊盘
供应商设备封装: 44-TQFN-EP(7x7)
包装: 带卷 (TR)
MAX6960–MAX6963
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
Pin Description
MQFP
PIN
TQFN
NAME
FUNCTION
1, 6, 11,
12, 44
1, 6, 11,
12, 44
GND
Ground
2–5, 7–10 2–5, 7–10
ROW1–ROW8
LED Cathode Drivers. ROW1 to ROW8 outputs sink current from the display's cathode rows.
13
14
15
16
17
18
19, 20,
21,
23–27,
29–33,
35, 36,
37
22, 28,
34, 38
39
40
41
13
14
15
16
17
18
19, 20,
21,
23–27,
29–33,
35, 36,
37
22, 28,
34, 38
39
40
41
OSC
CS
DIN
DOUT
CLK
RST
COL1–COL16
V+
ADDOUT
ADDIN
ADDCLK
Multiplex Clock Input. Drive OSC with a 1MHz to 8.5MHz CMOS clock.
Chip-Select Input. Serial data is loaded into the shift register when CS is low. Data is
loaded into the data latch on CS 's rising edge.
Serial-Data Input. Data from DIN loads into the internal shift register on CLK's rising edge.
Serial-Data Output. The output is tri-state.
Serial-Clock Input. On CLK's rising edge data shifts into the internal shift register.
Reset Input. Hold RST low until at least 50ms after all interconnected MAX6960s are
powered up.
LED Anode Drivers. COL1 to COL16 outputs source current into the display's anode
columns.
Positive Supply Voltage. Bypass V+ to GND with a single 47μF bulk capacitor per chip
plus a 0.1μF ceramic capacitor per V+.
Address-Data Output. Connect ADDOUT to ADDIN of the next MAX6960. Use ADDOUT of
the last MAX6960 as a plane change interrupt output.
Address-Data Input. For first MAX6960, connect ADDIN to V+. For other MAX6960s,
connect ADDIN to ADDOUT of the preceding MAX6960.
Address-Clock Input/Output. Connect ADDCLK of all MAX6960 drivers together, ensuring
that only one MAX6960's ADDIN input is connected to V+.
Digit 0 Current Setting. Connect RISET0 to GND to program all of digit 0's segment
42
42
RISET0
currents to 40mA. Leave RISET0 open circuit to program all of digit 0's segment currents
to 20mA. Connect RISET0 to GND through a fixed or variable resistor to adjust all of digit
0's segment currents between 20mA and 40mA.
Digit 1 Current Setting. Connect RISET1 to GND to program all of digit 1's segment
43
43
RISET1
currents to 40mA. Leave RISET1 open circuit to program all of digit 1's segment currents
to 20mA. Connect RISET1 to GND through a fixed or variable resistor to adjust all of digit
1's segment currents between 20mA and 40mA.
Maxim Integrated
EP
EP
Exposed Pad on Package Underside. Connect to GND.
5
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