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参数资料
| 型号： | MAX7307ALB+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 21/23页 |
| 文件大小： | 0K |
| 描述： | IC LED DRIVER LINEAR 10-UDFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 拓扑： | PWM |
| 输出数： | 4 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 背光，LED 闪烁器 |
| 类型 - 次要： | 白色 LED |
| 频率： | 1MHz |
| 电源电压： | 1.62 V ~ 3.6 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN |
| 供应商设备封装： | 10-uDFN（2x2） |
| 包装： | 带卷 (TR) |
| 工作温度： | -40°C ~ 125°C |
SMBus/I 2 C Interfaced 4-Port, Level-Translating
GPIOs and LED Drivers
nominally 31ms after the start of a valid serial transfer,
the interface resets itself and sets up SDA as an input.
The MAX7306/MAX7307 then waits for another START
condition.
Applications Information
Hot Insertion
Serial interfaces SDA, SCL (and AD0 for the MAX7306)
remain high impedance with up to 5.5V asserted on
them when the MAX7306/MAX7307 are powered down
(V DD = 0V), independent of the voltages on the port
supply V LA . When V DD = 0V, or if V DD falls below the
MAX7306/MAX7307 ’s reset threshold, all I/O ports
become high impedance. Ports P2 through P4 remain
high impedance to signals between 0V and the port
supply V LA for the MAX7307 and V DD for the MAX7306.
Port P1 goes high impedance to signals up to 5.5V. If a
signal outside this range is applied to a port, the port’s
protection diodes clamp the input signal to V LA or 0V,
as appropriate. If the MAX7307’s V LA is lower than the
input signal, the port pulls up V LA , and the protection
diode effectively powers any load on V LA from the input
signal. This behavior is safe if the current through each
protection diode is limited to 10mA.
If it is important that I/O ports remain high impedance
when all the supplies are powered down, including
the port supply V LA , then ensure that there is no direct
or parasitic path for the MAX7306/MAX7307 input signals
to drive current into either the regulator providing V LA
or other circuits powered from V LA . One simple way to
achieve this is with a series small-signal Schottky
diode, such as the BAT54, between the port supply
and the V LA input.
I/O Level Translation
The open-drain output configuration of the ports allows
them to level translate the outputs to lower (but not
higher) voltages than the V LA supply. An external
pullup resistor converts the high-impedance, logic-high
condition to a positive voltage level. Connect the resis-
tor to any voltage up to V LA . For interfacing CMOS
inputs, a pullup resistor value of 220k Ω is a good start-
ing point. Use a lower resistance to improve noise
immunity, in applications where power consumption is
less critical, or where a faster rise time is needed for a
given capacitive load.
Driving LED Loads
When driving LEDs, use a resistor in series with the
LED to limit the LED current to no more than 25mA.
Choose the resistor value according to the following
formula:
R LED = (V SUPPLY - V LED - V OL ) / I LED
where:
R LED is the resistance of the resistor in series with
the LED ( Ω )
V SUPPLY is the supply voltage used to drive the
LED (V)
V LED is the forward voltage of the LED (V)
V OL is the output low voltage of the MAX7306/
MAX7307 when sinking I LED (V)
I LED is the desired operating current of the LED (A).
For example, to operate a 2.2V red LED at 20mA from a
5V supply, R LED = (5 - 2.2 - 0.2) / 0.020 = 100 Ω .
Driving Load Currents Higher than 25mA
The MAX7306/MAX7307 can sink current from loads
drawing more than 25mA by sharing the load across
multiple ports configured as open-drain outputs. Use at
least one output per 25mA of load current; for example,
drive a 90mA white LED with four ports.
The register structure of the MAX7306/MAX7307 allows
only one port to be manipulated at a time. Do not con-
nect ports directly in parallel because multiple ports
cannot be switched high or low at the same time, which
is necessary to share a load safely. Multiple ports can
drive high-current LEDs because each port can use its
own external current-limiting resistor to set that port’s
current through the LED.
Power-Supply Considerations
The MAX7306/MAX7307 operate with a V DD power-sup-
ply voltage of 1.62V to 3.6V. Bypass V DD to GND with a
0.1μF capacitor as close as possible to the device. The
port supply V LA is connected to a supply voltage
between 1.40V and 5.5V and bypassed with a 0.1μF
capacitor as close as possible to the device. The V DD
supply and port supply are independent and can be
connected to different voltages or the same supply as
required.
Power supplies V DD and V LA can be sequenced in
either order or together.
For the MAX7307, when a push-pull port is acting as an
input referenced to V CC , make sure the VLA voltage is
greater than V CC - 0.3V.
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